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US 9,070,639 B2Granted
Shrinkage of critical dimensions in a semiconductor device by selective growth of a mask material
AssigneeGlobalfoundries Inc.
InventorsDmytro Chumakov, Volker Grimm
Life of this patent
Estimating the term…
Abstract
In sophisticated semiconductor devices, manufacturing techniques and etch masks may be formed on the basis of a mask layer stack which comprises an additional mask layer, which may receive an opening on the basis of lithography techniques. Thereafter, the width of the mask opening may be reduced by applying a selective deposition or growth process, which thus results in a highly uniform and well-controllable adjustment of the target width of the etch mask prior to performing the actual patterning process, for instance for forming sophisticated contact openings, via openings and the like.
Claims25
A method of forming an etch mask above a semiconductor device, the method comprising:
- forming an opening in a mask layer formed above at least one further mask layer and a material layer to be patterned, said opening extending through said mask layer and exposing a surface of a first layer formed below said mask layer;
- performing a selective deposition process by initiating selective growth of material on an exposed sidewall surface of said mask layer so as to reduce a width of said opening from a first width to a second width while maintaining exposure of at least a portion of said previously exposed surface of said first layer, wherein during said selective deposition process said material is formed only on said exposed sidewall surface of said mask layer and not on an upper surface of said mask layer;
- and
- patterning said at least one further mask layer by using said opening having said reduced width.
1 more element
A method, comprising:
- providing a material layer above a substrate of a semiconductor device;
- forming a mask layer stack above said material layer, said mask layer stack comprising a first mask layer and a second mask layer formed above said first mask layer;
- forming a first mask opening in said first mask layer by using a second mask opening formed in said second mask layer;
- reducing a width of said first mask opening by performing a selective deposition process and using an exposed sidewall surface of said first mask layer to initiate said selective deposition process, wherein during said selective deposition process said material is formed only on said exposed sidewall surface of said first mask layer and not on an upper surface of said first mask layer;
- and
- patterning said material layer by using said first mask opening having said reduced width as an etch mask.
3 more elements
A method, comprising:
- forming a mask layer above a material layer to be patterned, said material layer being formed above a substrate of a semiconductor device;
- forming a resist mask above said mask layer, said resist mask comprising a resist opening;
- forming a mask opening in said mask layer through said resist opening, said mask opening exposing a sidewall surface of said mask layer;
- growing a material selectively on said exposed sidewall surface in said mask opening to reduce a width of said mask opening while maintaining said resist mask above said mask layer;
- and
- patterning said material layer on the basis of said mask opening having said reduced width.
3 more elements
A method, comprising:
- forming a mask layer above a material layer to be patterned, said material layer being formed above a substrate of a semiconductor device;
- forming a resist mask above said mask layer, said resist mask comprising a resist opening;
- forming a mask opening in said mask layer through said resist opening, said mask opening exposing a sidewall surface of said mask layer;
- growing a material selectively on said exposed sidewall surface in said mask opening to reduce a width of said mask opening without forming said material on an upper surface of said mask layer;
- and
- patterning said material layer on the basis of said mask opening having said reduced width, wherein patterning said material layer on the basis of said mask opening having said reduced width comprises patterning at least one further mask layer by using said first mask layer and etching into said material layer by using at least said at least one further mask layer as an etch mask.
3 more elements
A method, comprising:
- forming a mask layer above a material layer to be patterned, said material layer being formed above a substrate of a semiconductor device;
- forming a resist mask above said mask layer, said resist mask comprising a resist opening;
- forming a mask opening in said mask layer through said resist opening, said mask opening exposing a sidewall surface of said mask layer;
- growing a material selectively on said exposed sidewall surface in said mask opening to reduce a width of said mask opening while preventing said material from being formed on an upper surface of said mask layer;
- and
- patterning said material layer on the basis of said mask opening having said reduced width, wherein patterning said material layer comprises forming an opening in said material layer so as to extend to one of a contact region of a semiconductor-based circuit feature and a metal region of a metallization system of said semiconductor device.
3 more elements
Dependencies are inferred from the claim text.