Method of fabricating dual trench isolated selective epitaxial diode array

A method of manufacturing a semiconductor device, the method comprising:

• providing a p-type semiconductor substrate;
• defining a diode array region and a peripheral device region on the p-type semiconductor substrate, wherein defining the diode array region and the peripheral device region on the p-type semiconductor substrate comprising:
• forming a groove having sidewalls and a bottom in the p-type semiconductor substrate as the diode array region and a region outside the groove as the peripheral device region;
• forming a N+ buried layer in the diode array region by performing an ion implantation process and an annealing process;
• forming a semiconductor epitaxial layer on the N+ buried layer;
• forming a deep trench isolation through the semiconductor epitaxial layer and the N+ buried layer into a portion of the p-type semiconductor substrate in a first direction;
• forming a shallow trench isolation in the diode array region in a second direction and a shallow trench isolation in the peripheral region in the second direction, the shallow trench isolation having a depth equal to or greater than a thickness of the semiconductor epitaxial layer;
• forming a N-well region in the p-type semiconductor substrate and a gate electrode of a CMOS device in the peripheral region;
• forming a source and a drain of the CMOS device in the N-well region;
• forming a P+ layer in the semiconductor epitaxial layer;
• and
• forming N+ contact regions in the diode array region and in the peripheral device region.