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US 9,070,609 B2Granted
Solid-state imaging device, manufacturing method thereof, and electronic apparatus
AssigneeSony Corporation
InventorKazuichiro Itonaga
Life of this patent
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Abstract
A solid-state imaging device that includes at least one pixel. The pixel includes a photodiode, a floating diffusion element in a region of the photodiode and a read out gate electrode at least partially surrounding the floating diffusion element in plan view.
Claims22
A solid-state imaging device comprising at least one pixel, the pixel further comprising:
- a photodiode;
- a floating diffusion element partially embedded in a first well region of the photodiode, the first well region at least partially abutting a second well region;
- and
- a read out gate electrode coupled to a first surface of a substrate and at least partially surrounding the floating diffusion element in plan view, but not overlapping the floating diffusion element in plan view,
- wherein the floating diffusion element is centered in the read out gate electrode,
- wherein the second well region is within an n-type semiconductor region,
- wherein the n-type semiconductor region lies between the second well region and a second, light incident surface of the substrate,
- wherein a seperating region extends from a first surface of the substrate to a first surface of a first semiconductor region, the first semiconductor region being coupled to the first surface of the substrate;
- wherein the n-type semiconductor region extends from the first surface of the substrate to the second surface of the substrate, and wherein the first well region and the second well region are symmetric about the floating diffusion element.
6 more elements
An electronic apparatus including a pixel, the pixel further comprising:
- a photodiode;
- a floating diffusion element partially embedded in a first well region of the photodiode, the first well region at least partially abutting a second well region;
- a read out gate electrode coupled to a first surface of a substrate and at least partially surrounding the floating diffusion element in plan view but not overlapping the floating diffusion element in plan view, wherein the floating diffusion element is centered in the read out gate electrode,
- wherein the second well region is within an n-type semiconductor region,
- wherein the n-type semiconductor region lies between the second well region and a second, light incident surface of the substrate, and
- wherein a seperating region extends from a first surface of the substrate to a first surface of a first semiconductor region, the first semiconductor region being coupled to the first surface of the substrate;
- wherein the n-type semiconductor region extends from the first surface of the substrate to the second surface of the substrate, and wherein the first well region and the second well region are symmetric about the floating diffusion element.
4 more elements
Dependencies are inferred from the claim text.