Method of manufacturing chip-type electric double layer capacitor

A method of manufacturing a chip-type electric double layer capacitor, comprising:

• forming a lower case having an opened housing space and first and second external terminals buried therein, the first and second external terminals having first surfaces exposed to the housing space, respectively, and second surfaces exposed to an outer region of the lower case, respectively;
• forming sealing portions in the respective corners of the housing space;
• mounting an electric double layer capacitor cell in the housing space such that the electric double layer capacitor cell is electrically connected to the first surfaces of the first and second external terminals exposed to the housing space;
• and
• mounting an upper cap on the lower case so as to cover the housing space.