Refresh circuits
AssigneeSK hynix Inc.
InventorDong Kyun Kim
Life of this patent
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Abstract
A refresh circuit includes a period signal generation circuit configured to drive a control node according to a level of the control node, discharge first and second currents from the control node in response to the first temperature signal, and generate a period signal, a division signal generator configured to divide the period signal to generate a first division signal and a second division signal, and a selector configured to select one of the first and second division signals in response to a second temperature signal and for outputting the selected division signal as a refresh signal.
Claims28
A refresh circuit comprising:
- a period signal generation circuit configured to drive a control node according to a voltage level of the control node and generate first and second currents from the control node in response to a first temperature signal, the period signal generation circuit generating a period signal based on the first and second currents generated;
- a division signal generator configured to divide the period signal to generate a first division signal and a second division signal;
- and
- a selector configured to select one of the first and second division signals in response to a second temperature signal and to output the selected division signal as a refresh signal,
- wherein the period signal generation circuit is configured to generate the first current when the first temperature signal has a first level, and to generate the second current when the first temperature signal has a second level.
A refresh circuit comprising:
- a period signal generation circuit configured to drive a control node according to a voltage level of the control node and generate a period signal based on first and second currents discharged from the control node;
- a division signal generator configured to divide the period signal to generate a first division signal and a second division signal;
- and
- a selector configured to select one of the first and second division signals in response to a temperature signal and output the selected division signal as a refresh signal,
- wherein a total current of the first and second currents is substantially constant when an internal temperature of the period signal generation circuit is below a first predetermined temperature, and the total current of the first and second currents varies as the internal temperature increases above the first predetermined temperature, and
- wherein the period signal generation circuit includes a first discharger coupled to the control node and configured to generate the first current by discharging the control node in response to an enable signal and a second discharger coupled to the control node and configured to generate the second current by discharging the control node in response to the enable signal.
A refresh circuit comprising:
- a control node configured to store charges and output first and second currents;
- a period signal generation circuit configured to generate a period signal that is based on the first and second currents output by the control node;
- a division signal generator configured to divide the period signal to generate a first division signal and a second division signal;
- and
- a selector configured to select one of the first and second division signals in response to a temperature signal and output the selected division signal as a refresh signal for a memory cell,
- wherein a sum of the first and second currents is substantially constant if a temperature associated with the memory cell is below a first temperature, and the sum of the first and second currents varies as the temperature associated with the memory cell increases above the first temperature, and
- wherein the period signal generation circuit includes a first discharger coupled to the control node and configured to generate the first current by discharging the control node in response to an enable signal and a second discharger coupled to the control node and configured to generate the second current by discharging the control node in response to the enable signal.
Dependencies are inferred from the claim text.