Non-volatile memory and methods with soft-bit reads while reading hard bits with compensation for coupling

A nonvolatile memory, comprising:

• memory cells accessible by word lines, said memory cells individually having threshold voltages each programmable into one of a first set of threshold voltage bands in a threshold window partitioned by a first set of reference thresholds, the first set of threshold voltage bands being coded by a first set of bits;
• sensing circuits to sense a current group of memory cells in parallel on a current word line;
• said sensing circuits sensing an adjacent group of memory cells on an adjacent word line to determine respective programmed states and associated coupling levels due to charges stored in neighboring memory cells on individual memory cells in the current group on the current word line, the coupling levels including a nominal coupling level corresponding to a substantially unprogrammed state in neighboring memory cells;
• said sensing circuits sensing the current group of memory cells by permuting a current word line voltage selected from the first set of reference thresholds and an adjacent word line voltage selected from a set of bias voltages obtained as a function of different associated coupling levels,
• so as to obtain the first set of bits when the bias voltage during the permutation corresponds to the nominal coupling level, and
• to obtain a second set of bits when the bias voltage during the permutation corresponds to other than the nominal coupling level.