Defective block management
AssigneeSanDisk Technologies LLC
InventorsNian Niles Yang, Uday Chandrasekhar, Yichao Huang, Alexandra Bauche, William S. Wu
Life of this patent
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Abstract
In a flash memory, erase blocks containing shorted or broken word lines may be used, at least in part, to store user data. Such blocks may use different parameters to those used by non-defective blocks, may be subject to different wear leveling, and may store data selected to reduce the number of access operations.
Claims24
A method of operating a block erasable non-volatile memory array that has one or more defective erase blocks, comprising:
- identifying two or more word lines that are shorted together in a defective erase block;
- recording location information regarding the location of the defective erase block and the location of the shorted word lines within the defective erase block;
- and
- subsequently, programming data along word lines of the defective erase block that are not the shorted word lines while the shorted word lines receive a pass voltage that is higher than a pass voltage applied to unselected word lines that are not shorted.
The method of claim wherein 1 wherein the shorted word lines are coupled to first memory cells and the word lines of the defective block that are not shorted are coupled other second memory cells that are connected in series with the first memory cells by NAND strings.
A non-volatile memory system comprising:
- an array of memory cells that are erasable in erase blocks;
- at least one defective erase block that has two or more word lines that are shorted together;
- location recording circuits that are configured to record the location of the erase block, and to record the location within the defective erase block of the word lines that are shorted together;
- and
- programming circuits that are configured to program data along word lines of the defective erase block that are not shorted together and are configured to maintain an elevated pass voltage to the two or more word lines that are shorted together during programming of data along word lines of the defective erase block that are not shorted together, the elevated pass voltage being higher than a pass voltage applied to unselected word lines of the defective erase block that are not shorted together.
Dependencies are inferred from the claim text.