Semiconductor device
AssigneeSK hynix Inc.
InventorsHye-Young Lee, Kie-Bong Ku, Choung-Ki Song, Sung-Hwa Ok, Se-Jin Yoo
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Abstract
A semiconductor device includes first and second bank groups coupled to first and second data lines which are electrically isolated from each other. The semiconductor device includes a register unit suitable for providing predetermined data to the second data line in a specific mode, a data transfer and output unit suitable for externally outputting the predetermined data loaded onto the second data line and simultaneously transferring the predetermined data to the first data line in the specific mode, and a data output unit suitable for externally outputting the predetermined data loaded onto the first data line in the specific mode.
Claims14
A semiconductor device comprising first and second bank groups coupled to first and second data lines which are electrically isolated from each other, the semiconductor device comprising:
- a register unit suitable for providing predetermined data to the second data line in a specific mode;
- a data transfer and output unit suitable for externally outputting the predetermined data loaded onto the second data line and simultaneously transferring the predetermined data to the first data line in the specific mode;
- and
- a data output unit suitable for externally outputting the predetermined data loaded onto the first data line in the specific mode,
- wherein the specific mode comprises a maximum data width option mode of data width option modes supported by the semiconductor device and a multi-purpose register (MPR) operation mode.
A semiconductor device comprising first and second bank groups coupled to first and second data lines which are electrically isolated from each other, the semiconductor device comprising:
- a multi-purpose register (MPR) suitable for providing multi-purpose data to the second data line in response to an MPR mode signal;
- a route selection unit suitable for generating first and second route selection signals by combining first and second bank group selection signals, the MPR mode signal, and a predetermined data width option mode signal;
- a route providing and data output unit suitable for externally outputting the multi-purpose data loaded onto the second data line and simultaneously transferring the multi-purpose data to the first data line in response to the first and the second route selection signals;
- and
- a data output unit suitable for externally outputting the multi-purpose data loaded onto the first data line in response to the first route selection signal.
A semiconductor device comprising first and second bank groups coupled to first and second data lines which are electrically isolated from each other, the semiconductor device, the semiconductor device comprising:
- a multi-purpose register (MPR) suitable for providing multi-purpose data to the first data line in response to an MPR mode signal;
- an enable signal generation unit suitable for generating an enable signal in response to an MPR mode signal and a predetermined data width option mode signal;
- a driver suitable for transferring the multi-purpose data loaded onto the first data line to the second data line in response to the enable signal;
- a first data output unit suitable for externally outputting the multi-purpose data loaded onto the first data line;
- and
- a second data output unit suitable for externally outputting the multi-purpose data loaded onto the second data line.
Dependencies are inferred from the claim text.