Image processing apparatus

An image processing apparatus which generates and outputs a plurality of processed images based on a plurality of set processing conditions from one input image input by branching a data bus output by a specific processing circuit within a pipeline comprising a plurality of processing circuits, the image processing apparatus comprising:

• a buffer having a storage capacity sufficient to store image data of the one input image;
• an input control unit configured to cause the buffer to store the image data of the one input image output from a previous-stage specific processing circuit to the data bus;
• a processing operation unit configured to perform image processing based on one processing condition among the plurality of set processing conditions on the input image and output image data of the processed image generated by the image processing;
• a plurality of output control units corresponding to each of the plurality of set processing conditions, wherein each of the output control units causes the image data necessary, when the image processing is performed in a corresponding processing condition within the image data of the one input image stored in the buffer, to be output to the processing operation unit, and causes the image data of the processed image generated by the processing operation unit based on the corresponding processing condition to be output to a corresponding subsequent-stage processing circuit;
• and
• an output arbitrating unit configured to determine which of the plurality of processing conditions is used to perform the image processing, and permits the output control unit corresponding to the determined processing condition to perform outputting the image data to the processing operation unit by the buffer.