Chip authentication using scan chains
AssigneeInternational Business Machines Corporation
InventorsFranco Motika, Dirk Pfeiffer, Peilin Song
Life of this patent
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Abstract
Methods and systems for generating a circuit identification number include determining a propagation time delay across a scan chain of known length; comparing the propagation time delay to a threshold associated with the scan chain length; storing an identifier bit based on the result of the comparison; repeating the steps of determining, comparing, and storing until a number of stored identifier bits reaches a threshold number; and outputting the stored identifier bits.
Claims25
A method for generating an identifying number, comprising:
- determining a propagation time delay across a scan chain of known length comprising a plurality of latches;
- generating one or more identifier bits based on the propagation time delay using a processor;
- repeating said determining and generating until a number of stored identifier bits reaches a threshold number;
- and
- outputting the stored identifier bits.
A method for generating an identifying number, comprising:
- determining a propagation time delay across a scan chain of known length comprising a plurality of latches;
- comparing the propagation time delay to a threshold associated with the scan chain length;
- storing an identifier bit based on the result of said comparison;
- repeating said determining, comparing, and storing until a number of stored identifier bits reaches a threshold number;
- and
- outputting the stored identifier bits.
A method for generating an identifying number, comprising:
- selecting a scan chain of known length comprising a plurality of latches from a plurality of scan chains;
- determining a propagation time delay across the selected scan chain;
- comparing the propagation time delay to a threshold associated with the scan chain length;
- storing an identifier bit based on the result of said comparison, including:
- storing a first state for the identifier bit if the propagation time delay exceeds the threshold;
- storing a second state for the identifier bit if the propagation time delay is below the threshold;
- storing a third state for the identifier bit if the propagation time delay is within a predetermined range of the threshold;
- and
- storing the third state for the identifier bit if the propagation time delay is above a second, timeout threshold;
- repeating said selecting determining, comparing, and storing until a number of stored identifier bits reaches a threshold number;
- and
- outputting the stored identifier bits.
A chip identifier circuit comprising:
- one or more scan chains of known length, comprising a plurality of latches, having an associated expected delay;
- a pulse generator configured to send a pulse through the one or more scan chains;
- a counter configured to determine a pulse delay;
- a processor configured to
- generate an identifier bit based on the determined pulse delay;
- repeat said determining and generating until a number of stored identifier bits reaches a threshold number;
- and
- output the stored identifier bits.
Dependencies are inferred from the claim text.