Method for checking data consistency in a system on chip

A system on chip, comprising:

• a core including,
• at least two processors,
• registers, and
• a data consistency check module linking the two processors, the core being configured to connect to at least one set of memories containing zones for first instructions of a first program and zones for second instructions of a second program, each program being configured to access data stored in data zones of the memories, said first and second instructions to be executed by the first and second processor, respectively, to produce and store result data into the registers or the memories, wherein,
• the first processor is configured to execute at least one instruction of the first program to produce first result data,
• the second processor is configured to execute at least one instruction of the second program to produce second result data distinct from the first result data,
• the data consistency check module is configured to obtain a test result by applying a function either over the first result data or the second result data, and to compare said test result either with the corresponding second result data or first result data, wherein the data consistency check module is configured to apply one of a logical operation, a mathematical function, and a cryptographic function as the function such that the obtained test result is a modified version of one of the first result data and the second result data, and
• the data consistency check module is configured to continue execution of instructions of each program by the first and second processor when the comparison is successful, and stop execution of instructions of each program by the first and second processor when the comparison shows an error.

A method for checking data consistency in a system on chip comprising a core including at least two processors, registers, and a data consistency check module linking the two processors, the data consistency check module being configured to perform tests to determine if data produced by the at least two processors at execution of program instructions satisfy desired comparison criteria or pass consistency tests or other error detecting processes, the core being configured to connect to at least one set of memories containing program zones for first instructions of a first program and program zones for second instructions of a second program, each program being configured to access data stored in data zones of the memories, said first and second instructions to be executed by the first and second processor, respectively, to produce and store result data into the registers or the memories, the method comprising:

• executing at least one instruction of the first program by the first processor to produce first result data,
• storing said first result data at desired addresses of the memory or register,
• executing at least one instruction of the second program by the second processor to produce second result data distinct from the first result data,
• storing said second result data at addresses of the memory or register defined by a desired mapping applied on each memory or register address where the corresponding first result data are stored,
• applying, by the data consistency check module, a function either over the first result data or the second result data to obtain a test result, wherein the applying a function applies one of a logical operation, a mathematical function, and a cryptographic function such that the obtained test result is a modified version of one of the first result data and the second result data,
• determining by the data consistency check module the memory or register addresses of the result data and identify suitable result data to verify,
• comparing, by the data consistency check module, the obtained test result either with the corresponding second result data or first result data,
• continuing execution of instructions of each program by the first and second processor when the comparison between the test result and the corresponding result data is successful, and
• stopping execution of instructions of each program by the first and second processor when the comparison shows an error.