System and method implementing full-rate writes for simulation acceleration
AssigneeCadence Design Systems, Inc.
InventorsMitchell Poplack, Beshara Elmufdi
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AssigneeCadence Design Systems, Inc.
InventorsMitchell Poplack, Beshara Elmufdi
Estimating the term…
A system and method for writing simulation acceleration data from a host workstation to a hardware emulation system without considerably sacrificing emulation speed or sacrificing the emulation capacity available for a user's logic design. According to one embodiment, a system comprises a logic software simulator running on a host workstation; a hardware emulation system having a system bus and an emulator chip, the emulator chip includes: an emulation processor that generates emulation data, and a data array connected to the system bus; and a high-speed interface connecting the host workstation to the system bus of the hardware emulator, wherein simulation acceleration data from the host workstation are written to the data array of the emulator chip using the system bus.
A system, comprising:
A method comprising the steps of:
Dependencies are inferred from the claim text.