Information processing apparatus

An information processing apparatus comprising:

• a memory configured to store therein a program status word containing an address of data that is to be read when an interrupt process is executed;
• a first processor configured to determine whether or not the program status word stored in the memory is available, and to control the memory to store a determination result in association with the program status word;
• and
• a second processor configured to acquire the program status word and the determination result from the memory when the interrupt process occurs, and to read data on the basis of the address contained in the acquired program status word when the acquired determination result indicates that the program status word is available, wherein
• the memory stores therein the program status word in a reproduced area that is a reproduction of a memory space of architecture which is different from the information processing apparatus,
• the first processor determines whether the program status word stored in the reproduced area of the memory is available,
• the memory stores the program status word and a determination result in a predetermined area of the memory in an associated manner,
• the second processor acquires the program status word and the determination result from the predetermined area of the memory when the interrupt process occurs, and
• the second processor acquires, from the predetermined area of the memory, the program status word and reads data by using an address contained in the acquired program status word when the determination result indicates that the program status word is available.