Downsampling with partial-sum re-use
AssigneeAnalog Devices, Inc.
InventorsBoris Lerner, Gopal Gudhur Karanam
Life of this patent
Estimating the term…
Abstract
The sampling rate of a digital signal is reduced by storing a series of partial sums of the digital signal instead of the signal itself, thus reducing the memory size required to perform the sampling-rate reduction.
Claims25
A method for a processor to computationally downsample digital samples xn, xn+1, . . . of a signal by a decimation factor d, the method comprising using the processor to perform:
- based on the decimation factor d and a number N of taps of an averaging filter to use for the downsampling, identifying a partial sum to use for the downsampling, wherein the partial sum is identified as a sum Sn+i,n+N−1 of (N−i) samples xn+i, . . . xn+N−1, wherein i is an integer portion of the decimation factor d;
- computing the partial sum Sn+i,n+N−1;
- storing the computed partial sum Sn+i,n+N−1 in a hardware register;
- computing a first sum Sn,n+N−1 of a first set of N digital samples xn, . . . xn+N−1 as a sum of a set of i digital samples xn, . . . xn+i−1 and the computed partial sum Sn+i,n+N−1;
- computing a second sum Sn+i,n+i+N−1 of a second set of N digital samples xn+i, . . . xn+i+N−1 as a sum of a set of i digital samples xn+N, . . . xn+i+N−1 and the computed partial sum Sn+i,n+N−1;
- and
- downsampling the digital samples based at least in part on the first sum Sn,n+N−1 and the second sum Sn+i,n+i+N−1.
A system for downsampling digital samples xn, xn+1, . . . of a signal by a decimation factor d, the system comprising:
- a processor comprising an averaging filter having N taps where N>1;
- and
- a second memory for storing a partial sum of two or more digital samples,
- wherein the averaging filter is configured to:
- based on the decimation factor d and a number of the taps of the averaging filter, identify the partial sum to use for the downsampling, wherein the partial sum is identified as a sum Sn+i,n+N−1 of (N−i) samples xn+i, . . . xn+N−1, wherein i is an integer portion of the decimation factor d,
- compute the partial sum Sn+i,n+N−1,
- store the computed partial sum Sn+i,n+N−1 in the second memory,
- compute a first sum Sn,n+N−1 of a first set of N digital samples xn, . . . xn+N−1 as a sum of a set of i digital samples xn, . . . xn+i−1 and the stored partial sum Sn+i,n+N−1,
- compute a second sum Sn+i,n+i+N−1 of a second set of N digital samples xn+i, . . . xn+i,n+N−1 as a sum of a set of i digital samples xn+N, . . . xn+i+N−1 and the stored partial sum Sn+i,n+N−1,
- compute a first average of N digital samples based on the first sum Sn,n+N−1, and
- compute a second average of N digital samples based on the second sum Sn+i,n+i+N−1.
A system for computationally downsampling digital samples xn, xn+1, . . . of a signal by a decimation factor d, the system comprising:
- means for, based on the decimation factor d and a number N of taps of an averaging filter to use for the downsampling, identifying a partial sum to use for the downsampling, wherein the partial sum is identified as a sum Sn+i,n+N−1 of (N−i) samples xn+i, . . . xn+N−1, wherein i is an integer portion of the decimation factor d;
- means for computing the partial sum Sn+i,n+N−1;
- means for storing the computed partial sum Sn+i,n+N−1 in a hardware register;
- means for computing a first sum Sn,n+N−1 of a first set of N digital samples xn, . . . xn+N−1 as a sum of a set of i digital samples xn, . . . xn+i−1 and the computed partial sum Sn+i,n+N−1 ;
- means for computing a second sum Sn+i,n+i+N−1 of a second set of N digital samples xn+i, . . . xn+i+N−1 as a sum of a set of i digital samples xn+N, . . . xn+i+N−1 and the computed partial sum Sn+i,n+N−1;
- and
- means for downsampling the digital samples based at least in part on the first sum Sn,n+N−1 and the second sum Sn+i,n+i+N−1.
A non-transitory computer readable storage medium storing one or more computer readable instructions which, when executed on a processor, configure the processor to carry out a method for computationally downsampling digital samples xn, xn+1, . . . of a signal by a decimation factor d, the method comprising:
- based on the decimation factor d and a number N of taps of an averaging filter to use for the downsampling, identifying a partial sum to use for the downsampling, wherein the partial sum is identified as a sum Sn+i,n+N−1 of (N−i) samples xn+i, . . . xn+N−1, wherein i is an integer portion of the decimation factor d;
- computing the partial sum Sn+i,n+N−1;
- storing the computed partial sum Sn+i,n+N−1 in a hardware register;
- computing a first sum Sn,n+N−1 of a first set of N digital samples xn, . . . xn+N−1 as a sum of a set of i digital samples xn, . . . xn+i−1 and the computed partial sum Sn+i,n+N−1;
- computing a second sum Sn+i,n+i+N−1 of a second set of N digital samples xn+i, . . . xn+i+N−1 as a sum of a set of i digital samples xn+N, . . . xn+i+N−1 and the computed partial sum Sn+i,n+N−1;
- and
- downsampling the digital samples based at least in part on the first sum Sn,n+N−1 and the second sum Sn+i,n+i+N−1.
Dependencies are inferred from the claim text.