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US 9,069,684 B2Granted
System, method, and computer program product for invalidatng cache lines
AssigneeNVIDIA Corporation
InventorWilliam Dally
Life of this patent
Estimating the term…
Abstract
A system, method, and computer program product are provided for invalidating cache lines. In use, one or more cache lines that hold data from within a region of a memory address space are invalidated.
Claims18
A method, comprising:
- invalidating one or more cache lines that hold data from within a region of a memory address space,
- wherein invalidating the one or more cache lines includes:
- identifying a region register that corresponds to the region of the memory address space, and
- comparing a phase field of a cache line within the cache to a phase field of the identified region register.
1 more element
A computer program product embodied on a non-transitory computer readable medium, comprising:
- code for invalidating one or more cache lines that hold data from within a region of a memory address space,
- wherein invalidating the one or more cache lines includes:
- identifying a region register that corresponds to the region of the memory address space, and
- comparing a phase field of a cache line within the cache to a phase field of the identified region register.
1 more element
A system, comprising:
- a content-addressable memory (CAM) for invalidating one or more cache lines that hold data from within a region of a memory address space,
- wherein invalidating the one or more cache lines includes:
- identifying a region register that corresponds to the region of the memory address space, and
- comparing a phase field of a cache line within the cache to a phase field of the identified region register.
1 more element
A system, comprising:
- a random-access memory (RAM) for invalidating one or more cache lines that hold data from within a region of a memory address space,
- wherein invalidating the one or more cache lines includes:
- identifying a region register that corresponds to the region of the memory address space, and
- comparing a phase field of a cache line within the cache to a phase field of the identified region register.
1 more element
Dependencies are inferred from the claim text.