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AssigneeArizona Board of Regents on behalf of Arizona State University
InventorsJemmy Sutanto, Jitendran Muthuswamy
Estimating the term…
Interconnect and/or reflow methods of the present disclosure achieve high aspect ratio interconnects, for example interconnects having an aspect ratio as high as 4, in addition to wider interconnect height tolerances among interconnects (for example, interconnects having a height variability of up to about 30%) while still achieving reliable electrical connections. Moreover, flip-chip interconnects configured in accordance with principles of the present disclosure can provide improved z-axis spacing between die-to-die and/or die-to-substrate flip chip stacks, for example z-axis spacing as large as 600 μm. In this manner, additional spacing can be achieved for MEMS devices and/or similar components that are extendable and/or deformable out of the die plane.
A method for forming electronic interconnects, the method comprising:
A method for forming electronic interconnects, the method comprising:
A method for forming electronic interconnects, the method comprising:
A method for reflowing solder paste, the method comprising:
Dependencies are inferred from the claim text.