Pattern modification with a preferred position function
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShih-Ming Chang, Ken-Hsien Hsieh
Life of this patent
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Abstract
A method for pattern modification for making an integrated circuit layout is disclosed. The method includes determining a feature within a pattern of the integrated circuit layout that can be rearranged; determining a range in which the feature can be repositioned; for the feature, determining a preferred position function that exhibits extreme values at preferable positions; and rearranging the position of the feature within the range to match an extreme value of the function.
Claims20
A method for pattern modification for making an integrated circuit layout, the method comprising:
- identifying a set of features within a pattern of the integrated circuit layout, the set of features including a first feature that is at a first distance from a second feature of the set of features;
- determining a range over which the first feature is repositionable according to a functional constraint;
- for the set of features, determining a specified distance;
- and
- repositioning the first feature within the range to a new position that is at a second distance from the second feature, the second distance being closer to an integer multiple of the specified distance than the first distance.
A computing system for optimizing a pattern of an integrated circuit layout, the system comprising:
- a processor;
- a memory comprising computer readable instructions that when executed by the processor, cause the processor to:
- determine a set of features within a pattern that are repositionable according to a functional constraint;
- determine a range for each feature of the set of features over which the features are repositionable;
- for the set of features, determine a specified distance;
- and
- reposition the features within the ranges such that the features are closer to an integer multiple of the specified distance.
A method for pattern modification, the method comprising:
- identifying a plurality of features within a pattern of an integrated circuit layout, the plurality of features being positioned at a first set of distances from each other, the first set of distances being varied, the first set of distances being along lines in varying directions;
- determining a range over which each of the plurality of features is repositionable according to a functional constraint;
- for the plurality of features, determining a specified distance, the specified distance corresponding to a minimum pitch;
- and
- repositioning the plurality of features such that the plurality of features are at a second set of distances from each other, the distances within the second set of distances being closer to an integer multiple of the specified distance.
Dependencies are inferred from the claim text.