# US 9,049,808 B2 · Printed wiring board and a method of manufacturing a printed wiring board > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,049,808 B2 - Document ID: US9049808B2 - Status: Granted - Kind: B2 - Application number: 13/213,199 - Filed: 2011-08-19 - Published: 2012-02-23 - Granted: 2015-06-02 - Earliest claimed: 2010-08-21 - Assignees: Ibiden Co., Ltd. - Applicants: Masaru Takada; Fusaji Nagaya - Inventors: Masaru Takada; Fusaji Nagaya - Web page: https://patentgrep.com/patent/US9049808B2 ## CPC - H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated} - H10W 70/685: comprising multiple insulating layers - H05K 2201/0209: Inorganic, non-metallic particles - H05K 2201/09136: Means for correcting warpage - H05K 2201/09827: Tapered, e.g. tapered hole, via or groove - H05K 2201/09854: Hole or via having special cross-section, e.g. elliptical - H10W 70/69: Insulating materials thereof - H10W 72/90: Bond pads, in general - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - Y10T 29/49165: by forming conductive walled aperture in base - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ## Abstract [Subject Matter] To provide a printed wiring board in which no warping occurs even if interlayer insulation layers without core material are laminated on a core substrate. [Solution(s)] To lower the thermal expansion coefficient (CTE) to 20˜40 ppm, inorganic particles are added to core substrate 30 formed by impregnating glass-cloth core material with glass-epoxy resin. Furthermore, thickness (a) of core substrate 30 is set at 0.2 mm, thickness (b) of upper-surface-side first interlayer insulation layer (50A) at 0.1 mm, and thickness (c) of lower-surface-side second interlayer insulation layer (50B) at 0.1 mm. In setting so, using thin core substrate 30 and interlayer insulation layers (50A, 50B) without core material, it is thought that warping does not occur in the printed wiring board. ## Claims ### Claim 1 A printed wiring board, comprising: a core substrate formed of a single layer having a thickness in a range of from about 0.06 mm to about 0.40 mm and a thermal expansion coefficient α in a range of from 5×10−6 to 8×10−6; a first conductive circuit formed directly on a first surface of the core substrate; a second conductive circuit formed directly on a second surface of the core substrate on an opposite side with respect to the first surface; a through-hole conductor formed in a penetrating hole extending from the first surface to the second surface of the core substrate and connecting the first conductive circuit and the second conductive circuit; at least one first interlayer insulation layer formed on the first surface of the core substrate; and at least one second interlayer insulation layer formed on the second surface of the core substrate, wherein the core substrate, the first interlayer insulation layer and the second interlayer insulation layer satisfy an equation, α/(E×(a+b+c))=0.5×10−6˜2.5×10−6/GPa·mm·K, where the thermal expansion coefficient of the core substrate is set at α, Young's modulus of the core substrate is E, a thickness of the core substrate is a, a sum of a thickness of the first interlayer insulation layer is b, and a sum of a thickness of the second interlayer insulation layer is c. ### Claim 2 (depends on 1) The printed wiring board according to claim 1, wherein the core substrate includes glass fiber, inorganic particles and resin. ### Claim 3 (depends on 1) The printed wiring board according to claim 1, wherein the core substrate includes inorganic particles in an amount of 20 wt. %˜40 wt. %. ### Claim 4 (depends on 2) The printed wiring board according to claim 2, wherein the inorganic particles are made of silica or alumina. ### Claim 5 (depends on 1) The printed wiring board according to claim 1, wherein each of the first and second interlayer insulation layers does not contain glass fiber. ### Claim 6 (depends on 1) The printed wiring board according to claim 1, wherein the penetrating hole has a first opening portion having a first opening on the first surface and a second opening portion having a second opening on the second surface, the first opening portion tapers from the first surface toward the second surface, the second opening portion tapers from the second surface toward the first surface, and the first opening portion and the second opening portion are connected in the core substrate. ### Claim 7 (depends on 1) The printed wiring board according to claim 1, wherein the through-hole conductor includes a plating material filling the penetrating hole of the core substrate. ### Claim 8 (depends on 6) The printed wiring board according to claim 6, wherein a straight line passing through a gravity center of the first opening and perpendicular to the first surface of the core substrate is offset from a straight line passing through a gravity center of the second opening and perpendicular to the first surface of the core substrate. ### Claim 9 (depends on 1) The printed wiring board according to claim 1, wherein a sum of the thickness of the core substrate, the thickness of the first interlayer insulation layer and the thickness of the second interlayer insulation layer is in a range of 0.08 mm˜0.60 mm. ### Claim 10 (depends on 1) The printed wiring board according to claim 1, wherein each of the thickness of the first interlayer insulation layer and the thickness of the second interlayer insulation layer is in a range of 0.01 mm˜0.10 mm. ### Claim 11 (depends on 1) The printed wiring board according to claim 1, wherein each of the first and second interlayer insulation layers is multilayered. ### Claim 12 (depends on 1) The printed wiring board according to claim 1, wherein the first interlayer insulation layer formed on the first surface of the core substrate includes a first conductive via which extends through the first interlayer insulation layer such that the first conductive via is connected to a first end of the through-hole conductor and offset from a center of the through-hole conductor, and the second interlayer insulation layer formed on the second surface of the core substrate includes a second conductive via which extends through the second interlayer insulation layer such that the second conductive via is connected to a second end of the through-hole conductor and offset from a center of the through-hole conductor. ### Claim 13 A method for manufacturing a printed wiring board, comprising: forming a penetrating hole for a through-hole conductor in a core substrate formed of a single layer; forming a first conductive circuit on a first surface of the core substrate; forming a second conductive circuit on a second surface of the core substrate on an opposite side with respect to the first surface; forming a through-hole conductor in the penetrating hole such that the through-hole conductor connects the first conductive circuit and the second conductive circuit; laminating at least one first interlayer insulation layer on the first surface of the core substrate; and laminating at least one second interlayer insulation layer on the second surface of the core substrate, wherein the core substrate has a thickness in a range of from about 0.06 mm to about 0.40 mm and a thermal expansion coefficient α in a range of from 5×10−6 to 8×10−6, and the core substrate, the first interlayer insulation layer and the second interlayer insulation layer satisfy an equation, α/(E×(a+b+c))=0.5×10−6˜2.5×10−6/GPa·mm·K, where the thermal expansion coefficient of the core substrate is set at α, Young's modulus of the core substrate is E, a thickness of the core substrate is a, a sum of a thickness of the first interlayer insulation layer is b, and a sum of a thickness of the second interlayer insulation layer is c. ### Claim 14 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the forming of the through-hole conductor includes filling a plating material in the penetrating hole. ### Claim 15 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the forming of the through-hole conductor includes filling an electrolytic plating material in the penetrating hole, the forming of the first conductive circuit and the forming of the second conductive circuit include forming electrolytic plated films of the first and second conductive circuits, and the forming of the through-hole conductor, the forming of the first conductive circuit and the forming of the second conductive circuit are conducted in a same process. ### Claim 16 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the core substrate includes glass fiber, inorganic particles and resin. ### Claim 17 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the core substrate includes inorganic particles in an amount of 20 wt. %˜40 wt. %. ### Claim 18 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the inorganic particles are made of silica or alumina. ### Claim 19 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the first and second interlayer insulation layers do not contain glass fiber. ### Claim 20 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein the forming of the penetrating hole includes forming a first opening portion having a first opening on the first surface and forming a second opening portion having a second opening on the second surface such that the first opening portion tapers from the first surface toward the second surface, that the second opening portion tapers from the second surface toward the first surface, and that the first opening portion and the second opening portion are connected in the core substrate. ### Claim 21 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein a straight line passing through a gravity center of the first opening and perpendicular to the first surface of the core substrate is offset from a straight line passing through a gravity center of the second opening and perpendicular to the first surface of the core substrate. ### Claim 22 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein a sum of the thickness of the core substrate, the thickness of the first interlayer insulation layer and the thickness of the second interlayer insulation layer is in a range of 0.08 mm˜0.60 mm. ### Claim 23 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein each of the thickness of the first interlayer insulation layer and the thickness of the second interlayer insulation layer is in a range of 0.01 mm˜0.10 mm. ### Claim 24 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, wherein each of the first and second interlayer insulation layers is multilayered. ### Claim 25 (depends on 13) The method for manufacturing a printed wiring board according to claim 13, further comprising: forming a first conductive via which extends through the first interlayer insulation layer such that the first conductive via is connected to a first end of the through-hole conductor and offset from a center of the through-hole conductor; and forming a second conductive via which extends through the second interlayer insulation layer such that the second conductive via is connected to a second end of the through-hole conductor and offset from a center of the through-hole conductor.