# US 9,049,786 B2 · Ceramic substrate and method for manufacturing the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 9,049,786 B2
- Document ID: US9049786B2
- Status: Granted
- Kind: B2
- Application number: 13/436,005
- Filed: 2012-03-30
- Published: 2012-10-04
- Granted: 2015-06-02
- Earliest claimed: 2011-04-01
- Assignees: Ngk Spark Plug Co., Ltd.
- Applicants: Toshihisa Nomura; Kenji Suzuki; Kazushige Akita
- Inventors: Toshihisa Nomura; Kenji Suzuki; Kazushige Akita
- Web page: https://patentgrep.com/patent/US9049786B2

## CPC

- H05K 1/0287: {having an universal lay-out, e.g. pad or land grid patterns or mesh patterns}
- H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)}
- H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers}
- G01R 1/07342: {the body of the probe being at an angle other than perpendicular to test object, e.g. probe card}
- G01R 3/00: Apparatus or processes specially adapted for the manufacture {or maintenance} of measuring instruments {, e.g. of probe tips}
- H05K 1/0306: {Inorganic insulating substrates, e.g. ceramic, glass}
- H05K 3/005: {Punching of holes}
- H05K 3/4061: {for via connections in inorganic insulating substrates}
- H05K 2201/0949: Pad close to a hole, not surrounding the hole
- H05K 2201/09609: Via grid, i.e. two-dimensional array of vias or holes in a single plane
- H05K 2201/0979: Redundant conductors or connections, i.e. more than one current path between two points
- Y10T 156/11: Methods of delaminating, per se; i.e. , separating at bonding face
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A ceramic substrate for an electronic part inspecting apparatus that can be manufactured in accordance with predetermined specifications, regardless of the number and location of pins required, relatively quickly and inexpensively is provided. In certain embodiments the ceramic substrate is configured to connect to a probe for inspecting an electronic component, and the ceramic substrate comprises a plurality of vias located in a center area of the ceramic substrate that penetrate through the ceramic substrate in its thicknesswise direction, pads located in an outer periphery that surrounds the center area where the vias are located, the pads being configured to connected to the probes, and a conductive layer located only over the front surface of the ceramic substrate and connects the vias to the respective pads. Certain embodiments comprise a greater number of vias than pins. A method of manufacturing the ceramic substrate is also provided.

## Claims

### Claim 1

A ceramic substrate configured to connect to probes for inspecting an electronic component, the ceramic substrate comprising:
a plurality of vias located in a center area of the ceramic substrate in a planar direction and that penetrate through the ceramic substrate in its thicknesswise direction;
pads configured to connect to the probes, at least a portion of the pads being located in an outer periphery that surrounds the center area where the vias are located; and
a conductive layer located only over a front surface of the ceramic substrate, wherein the conductive layer connects all of the pads to the vias;
wherein there is a greater number of the vias than the pads.

### Claim 2 (depends on 1)

The ceramic substrate of claim 1, wherein all of the pads are located in the outer periphery that surrounds the center area where the vias are located.

### Claim 3

A method for manufacturing a ceramic substrate having pads configured to connect to probes for inspecting an electronic component, the method comprising:
a first step of forming a plurality of via-filled portions that are filled with a via material on a ceramic green sheet;
a second step of sintering the ceramic green sheet to form a mother ceramic substrate having a plurality of vias;
a third step of forming the pads, which are configured to connect to the probes, and a conductive layer, which connects all of the pads to the vias over a front surface of the mother ceramic substrate; and
a fourth step of trimming the mother ceramic substrate to produce the ceramic substrate;
wherein there is a greater number of the vias than the pads, and wherein at least a portion of the pads are located in an outer periphery of the ceramic substrate that surrounds a center area where the vias are located.

### Claim 4 (depends on 3)

The method for manufacturing a ceramic substrate according to claim 3, further comprising:
a separating step of separating one or more ceramic green sheets that respectively correspond to mother ceramic substrates from a large-size ceramic green sheet before the first step;
wherein the ceramic green sheet after the separating step has an outside dimension corresponding to that of the mother ceramic substrate whose outside dimension is larger than that of the ceramic substrate.

### Claim 5 (depends on 3)

The method for manufacturing a ceramic substrate according to claim 3, wherein all of the pads are located in the outer periphery that surrounds the center area where the vias are located.