# US 9,049,779 B2 · Electrical components and methods of manufacturing electrical components

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- Number: US 9,049,779 B2
- Document ID: US9049779B2
- Status: Granted
- Kind: B2
- Application number: 13/686,471
- Filed: 2012-11-27
- Published: 2014-05-29
- Granted: 2015-06-02
- Earliest claimed: 2012-11-27
- Assignees: Tyco Electronics Corporation
- Applicants: Tyco Electronics Corporation
- Inventors: David Bruce Sarraf
- Web page: https://patentgrep.com/patent/US9049779B2

## CPC

- H05K 3/02: in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- C23C 18/1653: {Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating}
- C25D 5/02: Electroplating of selected surface areas
- C25D 5/48: After-treatment of electroplated surfaces
- C25D 7/00: Electroplating characterised by the article coated
- C25D 17/005: {Contacting devices}
- H01Q 1/36: Structural form of radiating elements, e.g. cone, spiral, umbrella; {Particular materials used therewith}(H01Q1/08, H01Q1/14 take precedence)
- H01Q 1/38: formed by a conductive layer on an insulating support {(patch antennas H01Q9/0407; microstrip dipole antennas H01Q9/065; microstrip slot antennas H01Q13/106; transmission line microstrip antennas H01Q13/206; manufacturing reflecting surfaces using insulating material for supporting the reflecting surface H01Q15/142)}
- H01Q 7/00: Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
- H05K 1/0296: {Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295 (H05K1/11 takes precedence; lay-out adapted to mounted component configuration H05K1/18)}
- H05K 3/242: {characterised by using temporary conductors on the printed circuit for electrically connecting areas which are to be electroplated}
- H05K 1/16: incorporating printed electric components, e.g. printed resistors, capacitors or inductors
- H05K 3/048: {using a lift-off resist pattern or a release layer pattern}
- H05K 2201/10098: Components for radio transmission, e.g. radio frequency identification [RFID] tag, printed or non-printed antennas
- H05K 2203/0769: Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- C25D: PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72)

## Abstract

An electrical component includes a substrate having a circuit area and a sacrificial area. A lift-off layer is deposited on the substrate in the sacrificial area. A seed layer is deposited on the substrate in the circuit area and on the lift-off layer in the sacrificial area. A plating layer is electrodeposited on the seed layer. The plating layer forms a circuit in the circuit area. The plating layer forms plating electrodes in the sacrificial area. The lift-off layer is removable from the substrate. The seed layer and the plating layer on the lift-off layer are removed with the lift-off layer when the lift-off layer is removed from the substrate, leaving the circuit on the substrate. The lift-off layer may be dissolved after the plating layer is formed, where the plating layer deposited on the lift-off layer is removed as the lift-off layer is dissolved.

## Claims

### Claim 1

An electrical component comprising:
a substrate having a circuit area and a sacrificial area;
a lift-off layer deposited on the substrate in the sacrificial area;
a seed layer deposited on the substrate in the circuit area and deposited on the lift-off layer in the sacrificial area; and
a plating layer electrodeposited on the seed layer, the plating layer forming a circuit in the circuit area, the plating layer forming plating electrodes on the lift-off layer in the sacrificial area;
wherein the lift-off layer is removable from the substrate, the seed layer and the plating layer on the lift-off layer being removed with the lift-off layer to entirely remove the plating electrodes when the lift-off layer is removed from the substrate leaving behind only the circuit on the substrate.

### Claim 2 (depends on 1)

The electrical component of claim 1, wherein the lift-off layer is an etch stop material configured to be removed in an alkaline bath.

### Claim 3 (depends on 1)

The electrical component of claim 1, wherein the plating layer is laser cut along the interface between the circuit area and the sacrificial area.

### Claim 4 (depends on 1)

The electrical component of claim 1, wherein the lift-off layer is printed on the substrate.

### Claim 5 (depends on 1)

The electrical component of claim 1, wherein the seed layer is printed on the lift-off layer and on the substrate.

### Claim 6 (depends on 1)

The electrical component of claim 1, wherein the plating layer is plated on the seed layer in an electrolytic bath.

### Claim 7 (depends on 1)

The electrical component of claim 1, wherein the circuit forms an antenna on the substrate.

### Claim 8 (depends on 1)

The electrical component of claim 1, wherein the seed layer is deposited in loops, the seed layer having shorting paths between the loops, the plating layer being deposited on the shorting paths to form shorting bars during electroplating, the shorting bars being removed after the plating layer is deposited on the seed layer.

### Claim 9 (depends on 1)

The electrical component of claim 1, wherein the lift-off layer is dissolved after the plating layer is formed, the plating layer deposited on the lift-off layer being removed as the lift-off layer is dissolved.

### Claim 10

A method of manufacturing an electrical component comprising:
providing a substrate having a circuit area and a sacrificial area;
depositing a lift-off layer on the substrate in the sacrificial area;
depositing a seed layer on the lift-off layer in the sacrificial area;
depositing a seed layer on the substrate in the circuit area;
plating a plating layer on the seed layer in the sacrificial area and the circuit area, the seed layer and plating layer in the sacrificial area forming plating electrodes; and
removing the lift-off layer and the plating layer on the lift-off layer without removing the plating layer in the circuit area such that the entire plating electrodes are removed from the substrate.

### Claim 11 (depends on 10)

The method of claim 10, wherein said removing the lift-off layer comprises applying an alkali solution to the lift-off layer to dissolve the lift-off layer.

### Claim 12 (depends on 10)

The method of claim 10, wherein said removing the lift-off layer comprises bathing the electrical component in an alkali bath, the alkali bath dissolving the lift-off layer to remove the plating layer on the lift-off layer.

### Claim 13 (depends on 10)

The method of claim 10, wherein said depositing a seed layer comprises printing the seed layer.

### Claim 14 (depends on 10)

The method of claim 10, wherein said plating a plating layer comprises electroplating the plating layer in an electrolytic bath.

### Claim 15 (depends on 10)

The method of claim 10, wherein said depositing a lift-off layer comprises depositing an etch stop material on the substrate in the sacrificial area.

### Claim 16 (depends on 10)

The method of claim 10, wherein said depositing a lift-off layer comprises printing the lift-off layer on the substrate.

### Claim 17 (depends on 10)

The method of claim 10, further comprising cutting the plating layer at an interface between the circuit area and the sacrificial area.

### Claim 18 (depends on 17)

The method of claim 17, wherein said cutting the plating layer comprises laser cutting the plating layer.

### Claim 19 (depends on 10)

The method of claim 10, wherein said depositing a seed layer in the circuit area comprises depositing the seed layer in loops with shorting paths between the loops, said plating the plating layer comprises plating the loops and the shorting paths to form shorting bars.

### Claim 20 (depends on 19)

The method of claim 19, further comprising removing the shorting bars.