Chip package

A chip package structure, comprising:

• a package body, comprising:
• at least one first connection terminal electrically connected to at least one core circuit via a first interconnection structure;
• and
• at least one second connection terminal electrically connected to an electrostatic discharge protection circuit via a second interconnection structure;
• a first lead configured on the package body and electrically connected to the second connection terminal for connecting an external circuit;
• and
• a second lead configured on the package body and separated from the first lead for an interconnection of the first connection terminal.

A chip package structure, comprising:

• a first chip;
• a second chip;
• an inner lead configured on the package body for electrically connecting to the first chip and the second chip;
• and
• an outer lead configured on the package body for electrically connecting the first chip and the second chip to an external circuit, wherein the inner lead and the outer lead are separate in structure,
• wherein at least one of the first chip and the second chip comprises a package body, comprising:
• a first core circuit comprising at least one first connection terminal thereon;
• an electrostatic discharge protection circuit comprising at least one second connection terminal thereon electrically connected to the outer lead;
• at least one third connection terminal, wherein the inner lead electrically connects the first connection terminal and the third connection terminal;
• and
• at least one interconnection structure electrically connected to the second connection terminal and the third connection terminal.