Back to results
US 9,041,050 B2Granted
IE type trench gate IGBT
AssigneeRenesas Electronics Corporation
InventorHitoshi Matsuura
Life of this patent
Estimating the term…
Abstract
In a method of further enhancing the performance of a narrow active cell IE type trench gate IGBT having the width of active cells narrower than that of inactive cells, it is effective to shrink the cells so that the IE effects are enhanced. However, when the cells are shrunk simply, the switching speed is reduced due to increased gate capacitance. A cell formation area of the IE type trench gate IGBT is basically composed of first linear unit cell areas having linear active cell areas, second linear unit cell areas having linear hole collector areas and linear inactive cell areas disposed therebetween.
Claims18
An injection enhancement (IE) type trench insulated gate bipolar transistor (IGBT) comprising:
- (a) a semiconductor substrate having first and second main surfaces;
- (b) a drift area disposed in the semiconductor substrate and having a first conductive type;
- (c) a cell formation area disposed on the first main surface;
- (d) a plurality of linear unit cell areas disposed in the cell formation area and each having first and second linear unit cell areas;
- (e) a metal gate electrode disposed on the first main surface;
- and
- (f) a metal emitter electrode disposed on the first main surface;
- the first linear unit cell areas each including:
- (x1) a linear active cell area disposed from the first main surface over an inner part of the drift area;
- (x2) first and second linear trench gate electrodes connected electrically to the metal gate electrode and disposed in first and second trenches in the first main surface, respectively, so as to hold the linear active cell area between the first and second linear trench gate electrodes from both sides;
- (x3) a body area disposed in a surface area on the side of the first main surface of the drift area and having a second conductive type opposite to the first conductive type;
- (x4) linear inactive cell areas disposed adjacently to both sides of the linear active cell area so as to hold the linear active cell area between the linear inactive cell areas from both sides while defining the first and second linear trench gate electrodes as boundaries;
- (x5) a floating area disposed in substantially all of a surface area on the side of the first main surface in the linear inactive cell areas deeper than the body area and having the same conductive type as that of the body area;
- and
- (x6) an emitter area of the first conductive type disposed in the surface area on the side of the first main surface of the body area;
- the second linear unit cell areas each including:
- (y1) a linear hole collector cell area disposed from the first main surface over the inner part of the drift area;
- (y2) third and fourth linear trench gate electrodes connected electrically to the metal emitter electrode and disposed in third and fourth trenches in the first main surface, respectively, so as to hold the linear hole collector cell area between the third and fourth linear trench gate electrodes from both sides;
- (y3) the body area disposed in the surface area on the side of the first main surface of the drift area;
- (y4) the linear inactive cell areas disposed adjacently to both sides of the linear hole collector cell area so as to hold the linear hole collector cell area between the third and fourth linear trench gate electrodes from both sides while defining the third and fourth linear trench gate electrodes as boundaries;
- and
- (y5) the floating area disposed in substantially all of the surface area on the side of the first main surface in the linear inactive cell area deeper than the body area and having the same conductive type as that of the body area,
- wherein a depth of the floating area is deeper than a lower end of the first and second trenches.
20 more elements
An injection enhancement (IE) type trench insulated gate bipolar transistor (IGBT) comprising:
- (a) a semiconductor substrate having first and second main surfaces;
- (b) a drift area disposed in the semiconductor substrate and having a first conductive type;
- (c) a cell formation area disposed on the first main surface;
- (d) a plurality of linear unit cell areas disposed in the cell formation area;
- (e) a metal gate electrode disposed on the first main surface;
- and
- (f) a metal emitter electrode disposed on the first main surface;
- the linear unit cell areas each including:
- (d1) a linear hybrid cell area disposed from the first main surface over an inner part of the drift area;
- (d2) first and second linear trench gate electrodes connected electrically to the metal emitter electrode and disposed in first and second trenches in the first main surface, respectively, so as to hold the linear hybrid cell area between the first and second linear trench gate electrodes from both sides;
- (d3) a body area disposed in the surface area on the side of the first main surface of the drift area and having a second conductive type opposite to the first conductive type;
- (d4) linear inactive cell areas disposed adjacently to both sides of a linear active cell area so as to hold the linear active cell area between the first and second linear trench gate electrodes from both sides while defining the first and second linear trench gate electrodes as boundaries;
- (d5) a floating area disposed in substantially all of a surface area on the side of the first main surface in the linear inactive cell area deeper than the body area and having the same conductive type as that of the body area;
- (d6) first and second linear hybrid sub-cell areas disposed in the linear hybrid cell area and being substantially symmetrical with each other;
- (d7) a third linear trench gate electrode connected electrically to the metal gate electrode and disposed in a third trench forming a boundary between the first and second linear hybrid sub-cell areas;
- and
- (d8) an emitter area of the first conductive type disposed in the surface area on the side of the first main surface of the body area so as to approach the third trench in both of the first and second linear hybrid sub-sell areas,
- wherein a depth of the floating area is deeper than a lower end of the first and second trenches.
15 more elements
An injection enhancement (IE) type trench insulated gate bipolar transistor (IGBT) comprising:
- (a) a semiconductor substrate having first and second main surfaces;
- (b) a drift area disposed in the semiconductor substrate and having a first conductive type;
- (c) a cell formation area disposed on the first main surface (1a);
- (d) a plurality of linear unit cell areas disposed in the cell formation area and each having first and second linear unit cell areas;
- (e) a metal gate electrode disposed on the first main surface;
- (f) a metal emitter electrode disposed on the first main surface;
- and
- (g) a gate wiring disposed in outer peripheral part of the cell formation area along a first side of the cell formation area;
- the first linear unit cell areas each including;
- (x1) a linear active cell area disposed from the first main surface over an inner part of the drift area so as to position one end of the linear active cell area on the first side of the cell formation area in a plane;
- (x2) first and second linear trench gate electrodes connected electrically to the metal gate electrode and disposed in first and second trenches in the first main surface, respectively, so as to hold the linear active cell area between the first and second linear trench gate electrodes from both sides;
- (x3) a body area disposed in a surface area on the side of the first main surface of the drift area and having a second conductive type opposite to the first conductive type;
- (x4) linear inactive cell areas disposed adjacently to both sides of the linear active cell area so as to hold the linear active cell area between the linear inactive cell areas from both sides while defining the first and second linear trench gate electrodes as boundaries;
- (x5) a floating area disposed in substantially all of a surface area on the side of the first main surface in the linear inactive cell area deeper than the body area and having the same conductive type as that of the body area;
- (x6) an emitter area of the first conductive type disposed in the surface area on the side of the first main surface of the body area;
- (x7) an end trench disposed in the surface area on the side of the first main surface along an end of the linear inactive cell area;
- (x8) a second conductive type area extending from the surface area on the side of the first main surface under the gate wiring until the vicinity of the end trench and disposed deeper than the body area, the second conductive type area being electrically connected to the metal emitter electrode;
- (x9) a peripheral contact part disposed between the gate wiring and the end trench and being in contact with the metal emitter electrode;
- and
- another trench being not disposed between the gate wiring and the peripheral contact part in the depth equal to or deeper than the end trench to separate the area disposed under the gate wiring and the peripheral contact part and disposed between the gate wiring and the peripheral contact part into an area near the gate wiring and an area near the end trench in a plane.
17 more elements
Dependencies are inferred from the claim text.