# US 9,040,987 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,040,987 B2 - Document ID: US9040987B2 - Status: Granted - Kind: B2 - Application number: 13/721,026 - Filed: 2012-12-20 - Published: 2013-09-05 - Granted: 2015-05-26 - Earliest claimed: 2012-03-01 - Assignees: E Ink Holdings Inc. - Applicants: E Ink Holdings Inc. - Inventors: Wei-Chou Lan; Ted-Hong Shinn; Henry Wang; Chia-Chun Yeh - Web page: https://patentgrep.com/patent/US9040987B2 ## CPC - H10D 30/67: Thin-film transistors [TFT] {(Stacked nanowire, nanosheet or nanoribbon FETs H10D30/501)} - H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)} - H10D 30/6758: {characterised by the insulating substrates} - H10D 86/411: {characterised by materials, geometry or structure of the substrates} - H10D 86/441: {Interconnections, e.g. scanning lines} - H10D 86/60: wherein the TFTs are in active matrices - H10D 30/6729: {characterised by the electrodes} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract A semiconductor device including a substrate, a metal layer, an insulating layer, a semiconductor layer, a drain and a source is provided. The substrate has a surface and a first cavity. The metal layer is disposed on the substrate and covers the surface and inner-wall of the first cavity to define a second cavity corresponding to the first cavity. The insulating layer covers the metal layer and inner-wall of the second cavity to define a third cavity corresponding to the second cavity. The semiconductor layer exposes a portion of the insulating layer and covers the inner-wall of the third cavity to define a fourth cavity corresponding to the third cavity. The drain and source are disposed on the semiconductor layer and covers a portion of the semiconductor layer and a portion of the insulating layer, in which the drain and source expose the fourth cavity. ## Claims ### Claim 1 A semiconductor device, disposed on a base-plate, the semiconductor device comprising: a substrate, having a surface and a first cavity located at the surface; a metal layer, disposed on the substrate, covering the surface and covering an inner-wall of the first cavity so as to define a second cavity corresponding to the first cavity; an insulating layer, disposed on the metal layer and covering the metal layer and an inner-wall of the second cavity so as to define a third cavity corresponding to the second cavity; a semiconductor layer, disposed on the insulating layer, exposing a portion of the insulating layer and covering an inner-wall of the third cavity so as to define a fourth cavity corresponding to the third cavity; a drain, disposed on the semiconductor layer and covering a portion of the semiconductor layer and a portion of the insulating layer, wherein the drain exposes the fourth cavity; and a source, disposed on the semiconductor layer and covering a portion of the semiconductor layer and a portion of the insulating layer, wherein the source exposes the fourth cavity. ### Claim 2 (depends on 1) The semiconductor device as claimed in claim 1, wherein a material of the substrate comprises organic material or inorganic material. ### Claim 3 (depends on 1) The semiconductor device as claimed in claim 1, wherein a depth of the first cavity is ¼- 9/10 of a thickness of the substrate. ### Claim 4 (depends on 1) The semiconductor device as claimed in claim 1, wherein an opening diameter of the second cavity is less than an opening diameter of the first cavity. ### Claim 5 (depends on 1) The semiconductor device as claimed in claim 1, wherein an opening diameter of the third cavity is less than an opening diameter of the second cavity. ### Claim 6 (depends on 1) The semiconductor device as claimed in claim 1, wherein an opening diameter of the fourth cavity is less than an opening diameter of the third cavity. ### Claim 7 (depends on 1) The semiconductor device as claimed in claim 1, further comprising a three-dimensional connecting circuit disposed on the insulating layer and connected to the source, wherein the three-dimensional connecting circuit comprises a first conductive layer, a filled material and a second conductive layer, the first conductive layer and the second conductive layer encapsulate the filled material and a material of the filled material is different from that of the first conductive layer and the second conductive layer. ### Claim 8 (depends on 7) The semiconductor device as claimed in claim 7, wherein the filled material comprises organic material, polymer material or polymer material containing a plurality of metallic particles. ### Claim 9 (depends on 8) The semiconductor device as claimed in claim 8, wherein a material of the metallic particles comprises silver or carbon. ### Claim 10 (depends on 1) The semiconductor device as claimed in claim 1, wherein the drain is in finger branch shape and has a plurality of first branches, the source is in finger branch shape and has a plurality of second branches, and the first branches and the second branches extend into the fourth cavity and are parallel to each other and alternately arranged. ### Claim 11 (depends on 1) The semiconductor device as claimed in claim 1, further comprising a protection layer disposed on the substrate and covering the semiconductor layer, the drain, the source and the fourth cavity, wherein the protection layer exposes a portion of the drain. ### Claim 12 (depends on 11) The semiconductor device as claimed in claim 11, further comprising a pixel electrode disposed on the substrate and connected to the portion of the drain exposed by the protection layer. ### Claim 13 (depends on 1) The semiconductor device as claimed in claim 1, wherein the semiconductor layer completely overlaps the metal layer.