# US 9,040,956 B2 · Unipolar heterojunction depletion-layer transistor

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- Number: US 9,040,956 B2
- Document ID: US9040956B2
- Status: Granted
- Kind: B2
- Application number: 12/998,944
- Filed: 2009-12-11
- Published: 2011-12-22
- Granted: 2015-05-26
- Earliest claimed: 2008-12-22
- Assignees: Ihp GmbH—Innovations for High Performance Microelectronics/Leibniz-Institut Fur Innovative Mikroelektronik
- Applicants: Wolfgang Mehr; Gunther Lippert
- Inventors: Wolfgang Mehr; Gunther Lippert
- Web page: https://patentgrep.com/patent/US9040956B2

## CPC

- H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D 10/881: {Resonant tunnelling transistors}
- H10D 48/362: {Unipolar transistors having ohmic electrodes on emitter-like, base-like, and collector-like regions, e.g. hot electron transistors [HET], metal base transistors [MBT], resonant tunnelling transistors [RTT], bulk barrier transistors [BBT], planar doped barrier transistors [PDBT] or charge injection transistors [CHINT]}
- H10D 62/882: {Graphene}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A depletion-layer transistor comprising a base, an emitter and a collector, in which the emitter contains a tunnel diode which permits a tunnel current of charge carriers from the emitter in the direction of the collector when an emitter-base voltage above a first threshold voltage is applied in the direction of current flow, and in which the base contains a graphene layer.

## Claims

### Claim 1

A unipolar heterojunction depletion-layer transistor comprising a base, an emitter and a collector, in which the emitter contains a tunnel diode which permits a tunnel current of charge carriers from the emitter in the direction of the collector when an emitter-base voltage above a first threshold voltage is applied in the direction of current flow, and in which the base contains a metal conductive graphene layer.

### Claim 2 (depends on 1)

The depletion-layer transistor according to claim 1, in which an emitter barrier layer is disposed between the graphene layer and the emitter and is configured to block charge carrier transport between the emitter and the graphene layer when emitter-base voltages are below the first threshold voltage, and to permit a tunnel current to flow between the emitter and the graphene layer when emitter-base voltages are above the threshold voltage.

### Claim 3 (depends on 1)

The depletion-layer transistor according to claim 1, in which a collector barrier layer is disposed between the graphene layer and the collector.

### Claim 4 (depends on 3)

The depletion-layer transistor according to claim 3, in which the emitter barrier layer is made of a first dielectric material and the collector barrier layer is made of a second dielectric material.

### Claim 5 (depends on 4)

The depletion-layer transistor according to claim 4, in which a band gap between the valence band and the conduction band of the second dielectric material is the same width as that of the first dielectric material.

### Claim 6 (depends on 4)

The depletion-layer transistor according to claim 4, in which a band gap between the valence band and the conduction band of the second dielectric material differs from that of the first dielectric material.

### Claim 7 (depends on 2)

The depletion-layer transistor according to claim 2, in which the emitter barrier layer is made of silicon oxide or some other dielectric material.

### Claim 8 (depends on 7)

The depletion-layer transistor according to claim 7, in which the emitter barrier layer and/or the collector barrier layer is either polycrystalline or monocrystalline.

### Claim 9 (depends on 8)

The depletion-layer transistor according to claim 8, in which the layer thickness of the emitter barrier layer is a number of atomic layers.

### Claim 10 (depends on 1)

The depletion-layer transistor according to claim 1, in which a boundary between the emitter and the base forms a Schottky diode, without an emitter barrier layer being deposited between the emitter and the base.

### Claim 11 (depends on 1)

The depletion-layer transistor according to claim 1, in which the emitter layer is made either of a doped first semiconductor material of a first conductivity type or of a metal, and in which the collector is made of a metal or of a doped second semiconductor material of the first conductivity type.

### Claim 12 (depends on 11)

The depletion-layer transistor according to claim 11, in which the first semiconductor material is silicon and the second semiconductor material is a silicon-germanium alloy or germanium.

### Claim 13 (depends on 11)

The depletion-layer transistor according to claim 11, in which at least one of the first and second semiconductor materials is monocrystalline.

### Claim 14 (depends on 11)

The depletion-layer transistor according to claim 11, in which at least one of the first and second semiconductor materials is polycrystalline or amorphous.

### Claim 15 (depends on 1)

The depletion-layer transistor according to claim 1, in which the emitter or the collector or both the emitter and the collector are made of a metal oxide.

### Claim 16 (depends on 1)

The depletion-layer transistor according to claim 1, in which the base consists of the graphene layer.

### Claim 17 (depends on 12)

The depletion-layer transistor according to claim 12, in which at least one of the first and second semiconductor materials is monocrystalline.

### Claim 18 (depends on 12)

The depletion-layer transistor according to claim 12, in which at least one of the first and second semiconductor materials is polycrystalline or amorphous.
