# US 9,040,955 B2 · Semiconductor device, optical sensor device and semiconductor device manufacturing method

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- Number: US 9,040,955 B2
- Document ID: US9040955B2
- Status: Granted
- Kind: B2
- Application number: 13/505,226
- Filed: 2011-05-19
- Published: 2012-08-30
- Granted: 2015-05-26
- Earliest claimed: 2010-06-03
- Assignees: Sumitomo Electric Industries, Ltd.
- Applicants: Kei Fujii; Katsushi Akita; Takashi Ishizuka; Hideaki Nakahata; Yasuhiro Iguchi; Hiroshi Inada; Youichi Nagai
- Inventors: Kei Fujii; Katsushi Akita; Takashi Ishizuka; Hideaki Nakahata; Yasuhiro Iguchi; Hiroshi Inada; Youichi Nagai
- Web page: https://patentgrep.com/patent/US9040955B2

## CPC

- H10F 77/146: {Superlattices; Multiple quantum well structures}
- B82Y 20/00: Nanooptics, e.g. quantum optics or photonic crystals
- H10F 30/223: the potential barrier being a PIN barrier
- H10F 71/1272: {comprising at least three elements, e.g. GaAlAs or InGaAsP}
- H10F 77/1248: {having three or more elements, e.g. GaAlAs, InGaAs or InGaAsP}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES

## Abstract

Provided are a semiconductor device and an optical sensor device, each having reduced dark current, and detectivity extended toward longer wavelengths in the near-infrared. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device 50 includes an absorption layer 3 of a type II (GaAsSb/InGaAs) MQW structure located on an InP substrate 1, and an InP contact layer 5 located on the MQW structure. In the MQW structure, a composition x (%) of GaAsSb is not smaller than 44%, a thickness z (nm) thereof is not smaller than 3 nm, and z≧−0.4x+24.6 is satisfied.

## Claims

### Claim 1

A semiconductor device formed on a group III-V semiconductor substrate, comprising:
an absorption layer of a type II multiple quantum well structure, located on the group III-V semiconductor substrate, wherein
the multiple quantum well structure is composed of a repetition of a layer containing at least Ga, As, and Sb, and a layer containing at least In, Ga, and As, and
the layer containing at least Ga, As, and Sb has an Sb composition x (at. %) and a thickness z (nm) which satisfy the following equations:
54 at. % <x(at. %)<68 at. %,
3 nm<z(nm)<10 nm, and
z(nm)<−0.625x(at. %)+45.5 nm.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the group III-V semiconductor substrate is InP.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the multiple quantum well structure is a strain-compensated structure, and the Sb composition x of the layer containing at least Ga, As, and Sb and an In composition y (at. %) of the layer containing at least In, Ga, and As satisfy 100<x+y<104.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, including an InP contact layer on the multiple quantum well structure.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1, wherein the thickness z (nm) of the layer containing at least Ga, As, and Sb in the multiple quantum well structure is not greater than −0.27x(at. %)+21.7 nm (z (nm)<−0.27x(at %)+21.7 nm) in the Sb composition range of 54.3 at. %<x<68 at. %.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein, in the multiple quantum well structure, a lattice mismatch of the layer contains at least In, Ga, and As is Δω1, a lattice mismatch of the layer contains at least Ga, As, and Sb is Δω2, a lattice mismatch Δω of the entire multiple quantum well structure is defined by Δω={Σ(Δω1×thickness of the layer containing at least In, Ga, and As+Δω2×thickness of the layer containing at least Ga, As, and Sb}/{Σ(thickness of the layer containing at least In, Ga, and As+thickness of the layer containing at least Ga, As, and Sb)}, and the Δω is not smaller than −0.2% but not greater than 0.2%.

### Claim 7 (depends on 1)

The semiconductor device according to claim 1, wherein the layer containing at least Ga, As, and Sb is GaAs1-xSbx.

### Claim 8 (depends on 1)

The semiconductor device according to claim 1, wherein the layer containing at least In, Ga, and As is Iny Ga1-yAs.

### Claim 9 (depends on 1)

The semiconductor device according to claim 1, wherein a maximum wavelength at which the absorption layer has detectivity is not shorter than 2.4 μm.

### Claim 10 (depends on 4)

The semiconductor device according to claim 4, wherein there is no regrown interface between a bottom surface of the absorption layer and an upper surface of a semiconductor layer including the absorption layer and the InP contact layer.

### Claim 11 (depends on 1)

An optical sensor device adopting, as a photodiode, the semiconductor device according to claim 1.