# US 9,040,952 B2 · Semiconductor device and method of fabricating the same

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- Number: US 9,040,952 B2
- Document ID: US9040952B2
- Status: Granted
- Kind: B2
- Application number: 14/044,752
- Filed: 2013-10-02
- Published: 2015-04-02
- Granted: 2015-05-26
- Earliest claimed: 2013-10-02
- Assignees: SK hynix Inc.
- Applicants: SK Hynix Inc.
- Inventors: Taejung Ha
- Web page: https://patentgrep.com/patent/US9040952B2

## CPC

- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10B 63/82: {the switching components having a common active material layer}
- H10B 63/84: {arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays}
- H10N 70/061: {Shaping switching materials}
- H10N 70/063: {by etching of pre-deposited switching material layers, e.g. lithography}
- H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8265: {on sidewalls of dielectric structures, e.g. mesa-shaped or cup-shaped devices}
- H10N 70/841: {Electrodes}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A semiconductor device includes a first conductive layer extending in a first direction, a second conductive layer extending in a second direction and disposed over the first conductive layer, the first and second directions being substantially perpendicular to each other, and a variable resistance layer disposed over the first conductive layer, the variable resistance layer extending in the second direction. An upper portion of the variable resistance layer is disposed between lower portions of two neighboring second conductive layers including the second conductive layer.

## Claims

### Claim 1

A semiconductor device, comprising:
a first conductive layer extending in a first direction;
a second conductive layer extending in a second direction and disposed over the first conductive layer, the first and second directions being substantially perpendicular to each other; and
a variable resistance layer disposed over the first conductive layer, the variable resistance layer extending in the second direction,
wherein an upper portion of the variable resistance layer is disposed between lower portions of two neighboring second conductive layers including said second conductive layer.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein a cross-section of each of the first and second conductive layers has a sidewall spacer shape with a removed top portion.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the second conductive layer includes a first sidewall contacting the variable resistance layer and a second sidewall having a curved portion, the curved portion including a plurality of subsections having different curvatures.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the variable resistance layer includes a reservoir layer and a tunnel barrier layer that are formed over the first conductive layer.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the variable resistance layer includes a reservoir layer and a selector layer that are formed over the first conductive layer.

### Claim 6 (depends on 4)

The semiconductor device of claim 4, wherein the tunnel barrier layer is conformally disposed over the reservoir layer and an exposed portion of the first conductive layer.

### Claim 7 (depends on 5)

The semiconductor device of claim 5, wherein the selector layer is disposed over a top surface of the reservoir layer.

### Claim 8 (depends on 4)

The semiconductor device of claim 4, wherein the tunnel barrier layer comprises a metal oxide layer satisfying a stoichiometric ratio, and the reservoir layer comprises an oxygen-deficient metal oxide layer.

### Claim 9 (depends on 1)

The semiconductor device of claim 1, wherein the variable resistance layer disposed over the first conductive layer corresponds to a first variable resistance layer, and the semiconductor device further comprises:
a third conductive layer extending in the first direction and disposed over the second conductive layer; and
a second variable resistance layer disposed over the second conductive layer and disposed between lower portions of two neighboring third conductive layers including said third conductive layer, the second variable resistance layer extending in the first direction.

### Claim 10 (depends on 9)

The semiconductor device of claim 9, wherein the second conductive layer functions as a bit line and the first conductive layer functions as a word line when a first vertically stacked memory cell including the first variable resistance layer is selected, and the second conductive layer functions as a word line and the third conductive layer functions as a bit line when a second vertically stacked memory cell including the second variable resistance layer is selected.

### Claim 11 (depends on 1)

The semiconductor device of claim 1, wherein two memory cells include the first conductive layer, the variable resistance layer, and the two neighboring second conductive layers.