# US 9,040,887 B2 · A/D converter and solid-state imaging apparatus with offset voltage correction

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- Number: US 9,040,887 B2
- Document ID: US9040887B2
- Status: Granted
- Kind: B2
- Application number: 13/591,903
- Filed: 2012-08-22
- Published: 2013-03-21
- Granted: 2015-05-26
- Earliest claimed: 2011-09-15
- Assignees: Canon Kabushiki Kaisha
- Applicants: Kohichi Nakamura; Hiroki Hiyama; Tetsuya Itano; Kazuhiro Saito
- Inventors: Kohichi Nakamura; Hiroki Hiyama; Tetsuya Itano; Kazuhiro Saito
- Web page: https://patentgrep.com/patent/US9040887B2

## CPC

- H04N 5/378
- G02F 7/00: Optical analogue/digital converters
- H04N 5/37455
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

Provided is an A/D converter including an input terminal, a reference signal line for supplying a reference signal which changes temporally, a comparator, a correction capacitor connected to an inverting input terminal of the comparator; and an output circuit which outputs digital data corresponding to an analog signal input to the input terminal. In a first state in which a total voltage of a first analog signal and an offset voltage of the comparator is held in the correction capacitor, a second analog signal input to the input terminal is supplied to a non-inverting input terminal of the comparator, and the second analog signal or the total voltage is changed using the reference signal, thereby outputting, from the output circuit, digital data.

## Claims

### Claim 1

An A/D converter comprising:
an input terminal for inputting an analog signal;
a reference signal line for connecting to a signal source that generates a reference signal which changes temporally;
a comparator which includes a non-inverting input terminal, an inverting input terminal, and an output terminal, and outputs, from the output terminal, an output signal according to a comparison result between a voltage supplied to the non-inverting input terminal and a voltage supplied to the inverting input terminal;
a correction capacitor connected to the inverting input terminal of said comparator; and
an output circuit which outputs digital data corresponding to the analog signal input to said input terminal,
wherein in a first state in which a total charge of a first analog signal and an offset voltage of said comparator is held in said correction capacitor, a second analog signal input to said input terminal is supplied to the non-inverting input terminal of said comparator, and the second analog signal supplied to the non-inverting input terminal of said comparator or the total voltage held in said correction capacitor is changed using the reference signal, thereby outputting, from said output circuit, digital data depending on a time from the beginning of the change until the output signal of said comparator changes as digital data corresponding to the second analog signal.

### Claim 2 (depends on 1)

The A/D converter according to claim 1, wherein in the first state, the first analog signal is supplied to the non-inverting input terminal of said comparator, and the first analog signal supplied to the non-inverting input terminal of said comparator or the total charge held in said correction capacitor is changed using the reference signal, thereby further outputting, from said output circuit, digital data depending on a time from the beginning of the change until the output signal of said comparator changes as digital data corresponding to the first analog signal.

### Claim 3 (depends on 1)

The A/D converter according to claim 1, further comprising:
a switch which connects the inverting input terminal and the output terminal of said comparator,
wherein the first analog signal is supplied to the non-inverting input terminal of said comparator in a state in which said switch is ON, and said switch is turned off after the total voltage is held in said correction capacitor, thereby setting the first state.

### Claim 4 (depends on 1)

The A/D converter according to claim 1, wherein the reference signal is a ramp signal.

### Claim 5 (depends on 1)

The A/D converter according to claim 1, wherein said correction capacitor includes a first electrode and a second electrode,
the first electrode of said correction capacitor is connected to the inverting input terminal of said comparator, and the reference signal is supplied to the second electrode of said correction capacitor in the first state, thereby changing the total charge held in said correction capacitor.

### Claim 6 (depends on 1)

The A/D converter according to claim 1, further comprising:
a sampling capacitor which includes a first electrode connected to the non-inverting input terminal of said comparator, and a second electrode,
wherein in the first state in which the second analog signal is further held in said sampling capacitor, the reference signal is supplied to the second electrode of said sampling capacitor, thereby changing the second analog signal supplied to the non-inverting input terminal of said comparator.

### Claim 7 (depends on 6)

The A/D converter according to claim 6, wherein said A/D converter comprises two sampling capacitors equivalent to said sampling capacitor, and
one sampling capacitor holds the first analog signal, and the other sampling capacitor holds the second analog signal.

### Claim 8 (depends on 1)

A solid-state imaging apparatus comprising:
an A/D converter of claim 1;
an analog signal generator which has a plurality of pixels, and generates pixel signals depending on charges obtained by photoelectric conversion for respective pixels; and
a controller which supplies the pixel signal to said A/D converter as the second analog signal, and controls said A/D converter to output digital data corresponding to the pixel signal.

### Claim 9 (depends on 8)

The apparatus according to claim 8, wherein each of the plurality of pixels further generates a noise signal at a pixel reset timing, and
said controller supplies the noise signal to said A/D converter as the first analog signal.

### Claim 10 (depends on 8)

The apparatus according to claim 8, wherein said analog signal generator further comprises an amplifier circuit which amplifies a signal from the pixel, and
said amplifier circuit generates the noise signal based on a reset-level signal of the pixel supplied from the plurality of pixels, and generates the pixel signal based on a signal obtained by superimposing a signal according to a charge generated by photoelectric conversion on the reset-level signal.

### Claim 11 (depends on 8)

The apparatus according to claim 8, wherein said A/D converter is arranged for each pixel column of the pixel array.
