# US 9,040,413 B2 · Using saturated and unsaturated ALD processes to deposit oxides as ReRAM switching layer

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- Number: US 9,040,413 B2
- Document ID: US9040413B2
- Status: Granted
- Kind: B2
- Application number: 13/714,162
- Filed: 2012-12-13
- Published: 2014-06-19
- Granted: 2015-05-26
- Earliest claimed: 2012-12-13
- Assignees: Intermolecular, Inc.; Kabushiki Kaisha Toshiba; SanDisk 3D LLC
- Applicants: Intermolecular Inc.; Kabushiki Kaisha Toshiba; SanDisk 3D LLC
- Inventors: Randall J. Higuchi; Chien-Lan Hsueh; Yun Wang
- Web page: https://patentgrep.com/patent/US9040413B2

## CPC

- H10N 70/021: {Formation of switching materials, e.g. deposition of layers}
- H10N 70/023: {by chemical vapor deposition, e.g. MOCVD, ALD}
- H10N 70/24: {based on migration or redistribution of ionic species, e.g. anions, vacancies}
- H10N 70/25: {based on bulk electronic defects, e.g. trapping of electrons}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/883: {Oxides or nitrides}
- H10N 70/8833: {Binary metal oxides, e.g. TaOx}
- H10B 63/20: {comprising selection components having two electrodes, e.g. diodes}
- H10B 63/80: {Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A nonvolatile memory device contains a resistive switching memory element with improved device switching performance and lifetime by custom tailoring the average concentration of defects in the resistive switching film and methods of forming the same. The nonvolatile memory element includes a first electrode layer, a second electrode layer, and a resistive switching layer disposed between the first electrode layer and the second electrode layer. The resistive switching layer comprises a first sub-layer and a second sub-layer, wherein the first sub-layer has more defects than the first sub-layer. A method includes forming a first sub-layer on the first electrode layer by a first ALD process and forming a second sub-layer on the first sub-layer by a second ALD process, where the first sub-layer has a different amount of defects than the second sub-layer.

## Claims

### Claim 1

A method of forming a nonvolatile memory element in a ReRAM device, the method comprising:
forming a resistive switching layer over a first electrode layer,
the resistive switching layer comprising:
a first sub-layer deposited using an unsaturated ALD process;
a second sub-layer deposited using a saturated ALD process, and
wherein an average concentration of defects in the first sub-layer is less than an average concentration of defects in the second sub-layer; and
forming a second electrode layer, so that the resistive switching layer is disposed between the first electrode layer and the second electrode layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the unsaturated ALD process and the saturated ALD process are performed in accordance with at least one of the following combinations:
a first combination wherein the unsaturated ALD process uses a first oxidizer/nitridizer and the saturated ALD process uses a second oxidizer/nitridizer different from the first oxidizer/nitridizer; or
a second combination wherein the unsaturated ALD process uses a first metal precursor and the saturated ALD process uses a second metal precursor different from the first metal precursor.

### Claim 3 (depends on 1)

The method of claim 1, wherein the resistive switching layer further comprises a third sub-layer deposited using a third ALD process, the third layer having less defects than the second sub-layer.

### Claim 4 (depends on 3)

The method of claim 3, wherein the third ALD process is performed in accordance with at least one of the following options:
a first option wherein the third ALD process is a saturated ALD process or an unsaturated ALD process;
a second option wherein the third ALD process uses an oxidizer/nitridizer different from an oxidizer/nitridizer used in the saturated ALD process and different from an oxidizer/nitridizer used in unsaturated ALD process; or
a third option wherein the third ALD process uses a metal precursor different from the metal precursor used in the saturated ALD process and different from an oxidizer/nitridizer used in unsaturated ALD process.

### Claim 5 (depends on 3)

The method of claim 3, wherein at least one of the first sub-layer, the second sub-layer, or the third sub-layer comprises a metal oxide layer, a two-metal oxide, a metal nitride layer, a metal oxide-nitride layer, a two-metal oxide-nitride layer, or a combination thereof.

### Claim 6 (depends on 5)

The method of claim 5, wherein the metal of the metal oxide layer comprises one or more of aluminum (Al), hafnium (Hf), zirconium (Zr), tantalum (Ta), titanium (Ti), vanadium (V), niobium (Nb), tungsten (W), or silicon (Si).

### Claim 7 (depends on 3)

The method of claim 3, wherein at least one of the first sub-layer, the second sub-layer, or the third sub-layer comprises at least one or more of AlOx, AlNx, AlOxNy, HfNx, ZrNx, SiNx, HfOxNy, ZrOxNy, AlOxNy, TaOxNy, HfAlOx, HfSiOx, HfTiOx, HfxSiyOzN(1-x-y-z), ZrxSiyOzN(1-x-y-z), HfxZryOzN(1-x-y-z), or HfxAlyOzN(1-x-y-z).

### Claim 8 (depends on 3)

The method of claim 3, wherein each of the sub-layers has a thickness between about 10 and 100 angstroms (Å).