# US 9,040,368 B1 · Thin film transistor and method of making the same

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- Number: US 9,040,368 B1
- Document ID: US9040368B1
- Status: Granted
- Kind: B1
- Application number: 14/375,911
- Filed: 2014-05-14
- Granted: 2015-05-26
- Earliest claimed: 2014-04-11
- Assignees: Shenzhen China Star Optoelectronics Technology Co., Ltd.
- Applicants: Shenzhen China Star Optoelectronics Technology Co., Ltd.
- Inventors: Tianming Dai
- Web page: https://patentgrep.com/patent/US9040368B1

## CPC

- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6737: {characterised by the electrode materials}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6743: {Silicon}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 64/0115: {to silicon carbide}
- H10D 86/0223: {comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method for fabricating a thin film transistor has the steps of: sequentially forming a buffer layer and a poly-silicon layer; forming a gate insulating layer on the poly-silicon layer, and etching the gate insulating layer to expose the poly-silicon layer needed for an ohmic contact; forming an ohmic contact layer on the gate insulating layer and the poly-silicon layer, and etching an extra portion of the ohmic contact layer to reserve the ohmic contact layer contacted with the poly-silicon layer; forming a gate electrode on the gate insulating layer; forming a dielectric layer on the gate electrode and the gate insulating layer, as well as forming through holes; and forming a source electrode and a drain electrode on the through hole.

## Claims

### Claim 1

A method for fabricating a thin film transistor, the method comprising the steps of:
sequentially forming a buffer layer and a poly-silicon layer;
forming a gate insulating layer on the poly-silicon layer, and etching the gate insulating layer to expose the poly-silicon layer needed for an ohmic contact;
forming an ohmic contact layer on the gate insulating layer and the poly-silicon layer, and etching an extra portion of the ohmic contact layer to reserve the ohmic contact layer contacted with the poly-silicon layer;
forming a gate electrode on the gate insulating layer;
forming a dielectric layer on the gate electrode and the gate insulating layer, as well as forming through holes; and
forming a source electrode and a drain electrode on the through hole.

### Claim 2 (depends on 1)

The method for fabricating a thin film transistor as claimed in claim 1, wherein in the step of sequentially forming a buffer layer and a poly-silicon layer, the buffer layer and an amorphous-silicon layer are sequentially deposited on the substrate of the thin film transistor, and then the amorphous-silicon layer is converted to the poly-silicon layer.

### Claim 3 (depends on 2)

The method for fabricating a thin film transistor as claimed in claim 2, wherein in the step of the amorphous-silicon layer is converted to the poly-silicon layer is using either a laser annealing or a metal solid-phase crystallization to convert the amorphous-silicon layer to the poly-silicon layer having a poly-silicon structure.

### Claim 4 (depends on 1)

The method for fabricating a thin film transistor as claimed in claim 1, wherein in the step of etching an extra portion of the ohmic contact layer to reserve the ohmic contact layer contacted with the poly-silicon layer, a channel region is first defined on the gate insulating layer, and the channel region of the gate insulating layer is etched to expose the poly-silicon layer needed for the ohmic contact.

### Claim 5 (depends on 1)

The method for fabricating a thin film transistor as claimed in claim 1, wherein in the step of forming a gate insulating layer on the poly-silicon layer, the material of the gate insulating layer are silicon nitride and silicon oxide, the silicon nitride of the gate insulating layer is etched by a dry etching manner, and then the silicon oxide of the gate insulating layer is etched by a wet etching manner.

### Claim 6 (depends on 5)

The method for fabricating a thin film transistor as claimed in claim 5, wherein in the step of the silicon oxide of the gate insulating layer is etched by a wet etching manner, an etching solution of the wet etching manner is selected from the group composing of hydrogen fluoride and ammonium fluoride.

### Claim 7

A method for fabricating a thin film transistor, the method comprising the steps of:
sequentially forming a buffer layer and an amorphous-silicon layer; converting the amorphous-silicon layer to a poly-silicon layer by a low temperature crystallization process;
forming a gate insulating layer having a silicon nitride and a silicon oxide on the poly-silicon layer, a channel region is defined on the gate insulating layer, and the channel region of the gate insulating layer is etched to expose the poly-silicon layer needed for an ohmic contact;
simultaneously depositing an ohmic contact layer and a metal gate layer on the gate insulating layer and the poly-silicon layer, and etching an extra region of the ohmic contact layer and the metal gate layer to reserve the ohmic contact layer;
forming a gate electrode on the gate insulating layer;
forming a dielectric layer on the gate electrode and the gate insulating layer, as well as forming through holes; and
forming a source electrode and a drain electrode on the through holes.

### Claim 8 (depends on 7)

The method for fabricating a thin film transistor as claimed in claim 7, wherein in the step of converting the amorphous-silicon layer to the poly-silicon layer is using either a laser annealing or a metal solid-phase crystallization to convert the amorphous-silicon layer to the poly-silicon layer having a poly-silicon structure.

### Claim 9 (depends on 7)

The method for fabricating a thin film transistor as claimed in claim 7, wherein in the step of forming a gate insulating layer having a silicon nitride and a silicon oxide on the poly-silicon layer, the gate insulating layer having the silicon nitride is first etched by a dry etching manner, and then the gate insulating layer having the silicon oxide is etched by a wet etching manner.

### Claim 10 (depends on 9)

The method for fabricating a thin film transistor as claimed in claim 9, wherein in the step of the gate insulating layer having the silicon oxide is etched by a wet etching manner, an etching solution of the wet etching manner is selected from the group composing of hydrogen fluoride and ammonium fluoride.
