# US 9,040,362 B1 · Method of manufacturing a MOS type semiconductor device

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- Number: US 9,040,362 B1
- Document ID: US9040362B1
- Status: Granted
- Kind: B1
- Application number: 14/512,377
- Filed: 2014-10-10
- Published: 2015-05-07
- Granted: 2015-05-26
- Earliest claimed: 2013-11-07
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Mitsuhiro Kakefu
- Web page: https://patentgrep.com/patent/US9040362B1

## CPC

- H10D 12/032: {of vertical IGBTs}
- H10D 12/441: {Vertical IGBTs}
- H10D 62/106: {having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions}
- H10D 64/112: {comprising multiple field plate segments}
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method of manufacturing a MOS type semiconductor device, includes, before forming a semiconductor functional structure including a necessary MOS gate structure on one principal surface of a silicon semiconductor substrate, in the order recited, a first step of heating the silicon semiconductor substrate in an oxygen-containing atmosphere under heat treatment conditions including a heat treatment temperature of higher than 1,280° C. and a heat treatment time necessary for introducing oxygen up to a solid solution limit concentration in the silicon semiconductor substrate as a whole body; and a second step of holding the silicon semiconductor substrate at a specified temperature in a range from 1,000° C. to 1,200° C. The method achieves small turn-off loss and little variation of ON voltages without controlling a collector layer to a lower concentration than the conventional technology.

## Claims

### Claim 1

A method of manufacturing a MOS type semiconductor device, comprising, before forming a semiconductor functional structure including a necessary MOS gate structure on one principal surface of a silicon semiconductor substrate, in the order recited:
a first step of heating the silicon semiconductor substrate in an oxygen-containing atmosphere under heat treatment conditions including a heat treatment temperature of higher than 1,280° C. and a heat treatment time necessary for introducing oxygen up to a solid solution limit concentration in the silicon semiconductor substrate as a whole body; and
a second step of holding the silicon semiconductor substrate at a specified temperature in a range from 1,000° C. to 1,200° C.

### Claim 2 (depends on 1)

The method of manufacturing a MOS type semiconductor device according to claim 1, wherein the specified temperature in the second step is 1,200° C. and a holding time at this temperature ranges from 15 hours to 25 hours.

### Claim 3 (depends on 2)

The method of manufacturing a MOS type semiconductor device according to claim 2, wherein the MOS type semiconductor device is an insulated gate bipolar transistor.

### Claim 4 (depends on 1)

The method of manufacturing a MOS type semiconductor device according to claim 1, wherein the heat treatment conditions in the first step are a heat treatment temperature of 1,300° C. and the heat treatment time ranges from 1 hour to 100 hour.

### Claim 5 (depends on 4)

The method of manufacturing a MOS type semiconductor device according to claim 4, wherein the MOS type semiconductor device is an insulated gate bipolar transistor.

### Claim 6 (depends on 1)

The method of manufacturing a MOS type semiconductor device according to claim 1, wherein the oxygen-containing atmosphere is a mixed gas of 20 volume percent of oxygen and 80 volume percent of argon.

### Claim 7 (depends on 6)

The method of manufacturing a MOS type semiconductor device according to claim 6, wherein the MOS type semiconductor device is an insulated gate bipolar transistor.

### Claim 8 (depends on 1)

The method of manufacturing a MOS type semiconductor device according to claim 1, wherein cooling down from the heat treatment temperature in the first step to the specified temperature in the second step takes place at a cooling down rate of 0.5° C./minute.

### Claim 9 (depends on 8)

The method of manufacturing a MOS type semiconductor device according to claim 8, wherein the MOS type semiconductor device is an insulated gate bipolar transistor.

### Claim 10 (depends on 1)

The method of manufacturing a MOS type semiconductor device according to claim 1, wherein the MOS type semiconductor device is an insulated gate bipolar transistor.