# US 9,040,350 B2 · Packaging and function tests for package-on-package and system-in-package structures

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- Number: US 9,040,350 B2
- Document ID: US9040350B2
- Status: Granted
- Kind: B2
- Application number: 14/277,197
- Filed: 2014-05-14
- Published: 2014-09-04
- Granted: 2015-05-26
- Earliest claimed: 2011-09-02
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Hao-Juin Liu; Chita Chuang; Ching-Wen Hsiao; Chen-Shien Chen; Chen-Cheng Kuo; Chih-Hua Chen
- Web page: https://patentgrep.com/patent/US9040350B2

## CPC

- H10P 74/23: {characterised by multiple measurements, corrections, marking or sorting processes}
- H10P 74/207: {Electrical properties, e.g. testing or measuring of resistance, deep levels or capacitance-voltage characteristics}
- H10W 72/00: Interconnections or connectors in packages
- H10W 90/00: Package configurations
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/0198: {batch processes}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 74/117: {the substrate having spherical bumps for external connection}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A method includes placing a plurality of bottom units onto a jig, wherein the plurality of bottom units is not sawed apart and forms an integrated component. Each of the plurality of bottom units includes a package substrate and a die bonded to the package substrate. A plurality of upper component stacks is placed onto the plurality of bottom units, wherein solder balls are located between the plurality of upper component and the plurality of bottom units. A reflow is performed to join the plurality of upper component stacks with respective ones of the plurality of bottom units through the solder balls.

## Claims

### Claim 1

A method comprising:
placing a package substrate strip onto a jig, wherein the jig comprises a recess and two portions on opposite sides of the recess, wherein a first plurality of solder regions of the package substrate strip is in the recess, and a bottom surface of the packages substrate is over and in contact with top surfaces of the two portions of the jig; and
bonding a plurality of upper component stacks onto package substrates in the package substrate strip through a second plurality of solder regions; and
after the bonding, removing the package substrate strip from the jig.

### Claim 2 (depends on 1)

The method of claim 1, wherein during the bonding, the first plurality of solder regions is spaced apart from an underlying top surface of the jig.

### Claim 3 (depends on 1)

The method of claim 1, wherein after the bonding, the first plurality of solder regions is not bonded to the jig.

### Claim 4 (depends on 1)

The method of claim 1 further comprising, before the bonding, performing a first function test on the package substrates by probing the package substrates using a probe card.

### Claim 5 (depends on 1)

The method of claim 1 further comprising, after the removing the package substrate strip from the jig, sawing the package substrates and the plurality of upper component stacks into a plurality of packages.

### Claim 6 (depends on 5)

The method of claim 5 further comprising, after the sawing, performing a second function test to test the plurality of packages.

### Claim 7 (depends on 5)

The method of claim 5, wherein after the sawing, the first plurality of solder regions is attached to the plurality of packages, and is not attached to the jig.

### Claim 8

A method comprising:
bonding a plurality of dies onto a package substrate strip to form a bottom package component comprising a plurality of bottom units, wherein the package substrate strip comprises a plurality of package substrates;
after the bonding the plurality of dies, placing the bottom package component onto a jig;
placing a plurality of upper component stacks onto the bottom package component, wherein each of the plurality of upper component stacks is placed on one of the plurality of bottom units; and
performing a reflow to join the plurality of upper component stacks with the plurality of bottom units, wherein after the reflow, the package substrate strip remains not bonded to the jig.

### Claim 9 (depends on 8)

The method of claim 8 further comprising performing a first function test on the bottom package component, wherein the first function test is performed after the bonding the plurality of dies and before the placing the bottom package component onto the jig.

### Claim 10 (depends on 9)

The method of claim 9, wherein a failed one of the plurality of bottom units is identified in the first function test, and wherein at a time the reflow is performed, the failed one of the plurality of bottom units has no upper component stack placed thereon.

### Claim 11 (depends on 8)

The method of claim 8, wherein the bottom package component comprises a plurality of solder regions, and with the bottom package component being placed onto the jig, the plurality of solder regions is located in a recess of the jig.

### Claim 12 (depends on 8)

The method of claim 8, wherein the bottom package component comprises a plurality of solder regions, and wherein with the bottom package component being placed onto the jig, the plurality of solder regions is physically spaced apart from the jig.

### Claim 13 (depends on 8)

The method of claim 8 further comprising, after the reflow, removing the package substrate strip from the jig.

### Claim 14 (depends on 8)

The method of claim 8 further comprising, after the reflow, performing a second function test to test the plurality of bottom units.

### Claim 15

A method comprising:
bonding a plurality of dies onto a package substrate strip to form a bottom package component comprising a plurality of bottom units, wherein the package substrate strip comprises a plurality of package substrates;
performing a first function test on the bottom package component;
after the first function test, placing the bottom package component onto a jig;
selectively placing a plurality of upper component stacks onto a first one of the plurality of bottom units, wherein the first one of the plurality of bottom units passes the first function test; and
performing a reflow to join the plurality of upper component stacks with the plurality of bottom units, wherein when the reflow is performed, a second one of the plurality of bottom units has no upper component stack placed thereon, and the second one of the plurality of bottom units fails the first function test.

### Claim 16 (depends on 15)

The method of claim 15, wherein after the reflow, the package substrate strip remains not bonded to the jig.

### Claim 17 (depends on 15)

The method of claim 15, wherein the plurality of package substrates in the bottom package component forms an array.

### Claim 18 (depends on 15)

The method of claim 15 further comprising, after the reflow, separating the bottom package component and the plurality of upper component stacks into a plurality of packages, wherein each of the plurality of packages comprises one of the plurality of package substrates, one of the plurality of dies, and one of the plurality of upper component stacks.

### Claim 19 (depends on 15)

The method of claim 15, wherein the package substrate strip comprises a plurality of solder balls facing the jig, and wherein during the reflow, the plurality of solder balls is spaced apart from the jig by an empty space.

### Claim 20 (depends on 19)

The method of claim 19, wherein the plurality of solder balls extends into a recess of the jig during the reflow.