# US 9,040,340 B2 · Temperature grading for band gap engineering of photovoltaic devices

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- Number: US 9,040,340 B2
- Document ID: US9040340B2
- Status: Granted
- Kind: B2
- Application number: 13/295,511
- Filed: 2011-11-14
- Published: 2013-05-16
- Granted: 2015-05-26
- Earliest claimed: 2011-11-14
- Assignees: International Business Machines Corporation
- Applicants: Ahmed Abou-Kandil; Keith E. Fogel; Augustin J. Hong; Jeehwan Kim; Mohamed Saad; Devendra K. Sadana
- Inventors: Ahmed Abou-Kandil; Keith E. Fogel; Augustin J. Hong; Jeehwan Kim; Mohamed Saad; Devendra K. Sadana
- Web page: https://patentgrep.com/patent/US9040340B2

## CPC

- H10F 10/17: Photovoltaic cells having only PIN junction potential barriers
- H10F 39/016: {of thin-film-based image sensors}
- H10F 71/103: {including only Group IV materials}
- H10F 77/1223: characterised by the dopants
- H10F 77/244: {made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers}
- H10F 77/247: {comprising indium tin oxide [ITO]}
- H10F 77/251: {comprising zinc oxide [ZnO]}
- Y02E 10/548: Amorphous silicon PV cells
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

A method for fabricating a photovoltaic device includes depositing a p-type layer at a first temperature and depositing an intrinsic layer while gradually increasing a deposition temperature to a final temperature. The intrinsic layer deposition is completed at the final temperature. An n-type layer is formed on the intrinsic layer.

## Claims

### Claim 1

A method for fabricating a photovoltaic device, comprising:
depositing a p-type layer at a first temperature;
depositing an intrinsic layer directly on the p-type layer while continuously increasing a deposition temperature to a final temperature, including forming a band gap alignment region at an interface between the p-type layer and the intrinsic layer such that band gap energy includes a continuous transition;
completing the intrinsic layer at the final temperature; and
forming an n-type layer directly on the intrinsic layer.

### Claim 2 (depends on 1)

The method as recited in claim 1, wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.

### Claim 3 (depends on 1)

The method as recited in claim 1, wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.

### Claim 4 (depends on 1)

The method as recited in claim 1, wherein continuously increasing a deposition temperature includes a linear increase in a temperature profile.

### Claim 5 (depends on 1)

The method as recited in claim 1, wherein completing the p-type layer includes isolating a p-type dopant source.

### Claim 6 (depends on 1)

The method as recited in claim 1, wherein the band gap alignment region is free of discontinuous band gap energy barriers.

### Claim 7 (depends on 1)

The method as recited in claim 1, further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.

### Claim 8 (depends on 1)

The method as recited in claim 1, wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius.

### Claim 9

A method for fabricating a photovoltaic device, comprising:
providing an electrode;
depositing a p-type layer at a first temperature on the electrode;
isolating a dopant source to complete the p-type layer;
forming an intrinsic layer directly on the p-type layer while continuously increasing a deposition temperature;
continuing to continuously increase the deposition temperature to a final temperature to complete the intrinsic layer wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius; and
forming an n-type layer directly on the intrinsic layer.

### Claim 10 (depends on 9)

The method as recited in claim 9, wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.

### Claim 11 (depends on 9)

The method as recited in claim 9, wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.

### Claim 12 (depends on 9)

The method as recited in claim 9, wherein continuously increasing a deposition temperature includes a linear increase in a temperature profile.

### Claim 13 (depends on 9)

The method as recited in claim 9, wherein continuously increasing a deposition temperature includes forming a band gap alignment region between the p-type layer and the intrinsic layer such that band gap energy includes a continuous transition between the p-type layer and the intrinsic layer.

### Claim 14 (depends on 13)

The method as recited in claim 13, wherein the band gap alignment region is free of discontinuous band gap energy barriers between the p-type layer and the intrinsic layer.

### Claim 15 (depends on 9)

The method as recited in claim 9, further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.

### Claim 16 (depends on 9)

The method as recited in claim 9, wherein providing an electrode includes forming one of a transparent conductive electrode or a metal electrode.

### Claim 17

A method for fabricating a photovoltaic device, comprising:
depositing a p-type layer at a first temperature;
depositing an intrinsic layer directly on the p-type layer while continuously and linearly increasing a deposition temperature to a final temperature;
completing the intrinsic layer at the final temperature; and
forming an n-type layer directly on the intrinsic layer.

### Claim 18 (depends on 17)

The method as recited in claim 17, wherein the p-type layer, the intrinsic layer and the n-type layer include amorphous silicon or an amorphous compound including silicon.

### Claim 19 (depends on 17)

The method as recited in claim 17, wherein the first temperature includes about 200 degrees Celsius and the final temperature includes about 250 degrees Celsius.

### Claim 20 (depends on 17)

The method as recited in claim 17, wherein completing the p-type layer includes isolating a p-type dopant source.

### Claim 21 (depends on 17)

The method as recited in claim 17, further comprising providing a degradation efficiency that is less than a degradation efficiency provided by including carbon at an interface between the p-type layer and the intrinsic layer.

### Claim 22 (depends on 17)

The method as recited in claim 17, wherein a difference between the first temperature and the final temperature is between about 50 to about 80 degrees Celsius.

### Claim 23 (depends on 17)

The method as recited in claim 17, wherein gradually increasing a deposition temperature includes forming a band gap alignment region at an interface between the p-type layer and the intrinsic layer such that band gap energy includes a gradual transition.

### Claim 24 (depends on 23)

The method as recited in claim 23, wherein the band gap alignment region is free of discontinuous barriers.