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US 9,034,693 B2Granted
Integrated circuit package with open substrate and method of manufacturing thereof
AssigneeST Assembly Test Services Ltd.
InventorsIl Kwon Shim, Kwee Lan Tan, Jian Jun Li, Dario S. Filoteo, Jr.
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Abstract
A method of manufacturing an integrated circuit package includes: forming a substrate including: forming a core layer, and forming vias in the core layer; forming a conductive layer having a predetermined thickness on the core layer and having substantially twice the predetermined thickness in the vias; and forming connections between an integrated circuit die and the conductive layer.
Claims5
A method of manufacturing an integrated circuit package comprising:
- forming a substrate including:
- forming a core layer, and
- forming vias in the core layer;
- forming a conductive layer having a predetermined thickness on the core layer and having a fold within the vias having substantially twice the predetermined thickness in the vias, a center of the fold blocking off the vias;
- forming terminals from the conductive layer, the terminals under and in direct contact with the core layer;
- and
- forming connections between an integrated circuit die and the conductive layer.
4 more elements
Dependencies are inferred from the claim text.