Determination of wake signal initiation on shared wake pins in computing devices

A computer-implemented method, comprising:

• receiving, at a shared wake pin of a computing device, wherein the shared wake pin is operably connected to first and second external devices, a wake signal;
• responsive to receipt of the wake signal at the shared wake pin, facilitating, by logic associated with the computing device, transition of the computing device from a first power state in which the computing device consumes a first amount of power to a second power state in which the computing device consumes a second amount of power that is greater than the first amount of power, wherein the second amount of power is less than a third amount of power consumed by the computing device when in a third state;
• responsive to receipt of the wake signal at the shared wake pin, sending, by the logic associated with the computing device, an instruction to the first external device over a communication bus to which the first external device is connected and the second external device is not, wherein the shared communication bus is different than the shared wake pin;
• and
• determining, by the logic associated with the computing device, whether the first or second external device initiated the wake signal based on whether the wake signal changes in response to the instruction.

A package, comprising:

• one or more processors;
• a memory operably coupled with the one or more processors;
• a shared wake pin operably coupled with first and second external devices;
• an inter-integrated circuit bus to which the first external device is operably coupled and the second external device is not, wherein the inter-integrated circuit bus is different than the shared wake pin;
• and
• a logic to be operated by the one or more processors, the logic to transition a computing device in which the package is installed between a first power state in which the computing device uses a first amount of power and a second power state in which the computing device uses a second amount of power that is greater than the first amount of power;
• wherein responsive to receipt of a wake signal at the shared wake pin, the logic is further to:
• transition the computing device from the first power state to the second power state;
• send an instruction to the first external device over the inter-integrated circuit bus;
• and
• determine whether the first or second external device initiated the wake signal based on whether the wake signal changes in response to the instruction.

At least one non-transitory computer-readable medium having computer-readable code embodied therein, the computer-readable code to enable a computing device, in response to execution of the code, to:

• receive, at a shared wake pin of the computing device, wherein the shared wake pin is operably connected to first and second external devices, a wake signal;
• responsive to receipt of the wake signal at the shared wake pin, facilitate transition of the computing device from a first power state in which the computing device consumes a first amount of power to a second power state in which the computing device consumes a second amount of power that is greater than the first amount of power, wherein the second amount of power is less than a third amount of power consumed by the computing device when in a fully operational third state;
• responsive to receipt of the wake signal at the shared wake pin, send an instruction to the first external device over a communication bus to which the first external device is connected and the second external device is not, wherein the shared communication bus is different than the shared wake pin;
• and
• determine whether the first or second external device initiated the wake signal based on whether the wake signal changes in response to the instruction.