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US 9,025,358 B2Granted
Semiconductor memory having both volatile and non-volatile functionality comprising resistive change material and method of operating
AssigneeZeno Semiconductor, Inc.
InventorYuniarto Widjaja
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Abstract
A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory including a bipolar resistive change element, and methods of operating.
Claims20
A semiconductor memory cell comprising:
- a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to said cell;
- and
- a non-volatile memory comprising a bipolar resistive change element;
- wherein said floating body has a first conductivity type selected from n-type conductivity type and p-type conductivity type;
- said memory cell further comprising first and second regions at first and second locations of said cell, said first and second regions each having a second conductivity type selected from said n-type conductivity type and said p-type conductivity type and being different from said first conductivity type.
2 more elements
A semiconductor memory cell comprising:
- a silicon controlled rectifier device configured to store data and operate as volatile memory when power is applied to said cell;
- and
- a non-volatile memory comprising a bipolar resistance change element:
- wherein said silicon controlled rectifier device comprises a floating body region having a first conductivity type selected from n-type conductivity type and p-type conductivity type;
- said memory cell further comprising first and second regions at first and second locations of said cell, said first and second regions each having a second conductivity type selected from said n-type conductivity type and said p-type conductivity type and being different from said first conductivity type.
2 more elements
A method of operating semiconductor memory to function as volatile memory, while having the ability to retain stored data when power is discontinued to the semiconductor memory, said method comprising:
- storing data in a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to said memory, wherein said floating body operates as a capacitorless DRAM cell or a bi-stable SRAM cell;
- and
- storing data in a bipolar resistance change element by configuring the bipolar resistance change element in one of a low resistivity state or a high resistivity state, wherein each of said resistivity states corresponds to a different data value, respectively.
Dependencies are inferred from the claim text.