Power and pin efficient chip-to-chip communications with common-mode rejection and SSO resilience
AssigneeEcole Polytechnique Federale de Lausanne
InventorsHarm Cronie, Amin Shokrollahi
Life of this patent
Estimating the term…
Abstract
In bus communications methods and apparatus, a first set of physical signals representing the information to be conveyed over the bus is provided, and mapped to a codeword of a spherical code, wherein a codeword is representable as a vector of a plurality of components and the bus uses at least as many signal lines as components of the vector that are used, mapping the codeword to a second set of physical signals, wherein components of the second set of physical signals can have values from a set of component values having at least three distinct values for at least one component, and providing the second set of physical signals for transmission over the data bus in a physical form.
Claims20
An apparatus comprising:
- a code map unit configured to receive k source bits as a code map unit input and to generate a first set of n values where the sum of the squares of the values is predetermined;
- a transform unit connected to the code map unit and configured to receive the first set of n values and to generate a second set of n values;
- and,
- a modulator configured to generate a modulated signal output based on the second set of n values.
A method comprising:
- receiving k source bits at a code map unit and generating a first set of n values where the sum of the squares of the values is predetermined;
- receiving the first set of n values from the code map unit at a transform unit and responsively generating a second set of n values;
- and,
- generating a modulated signal output from a modulator based on the second set of n values.
Dependencies are inferred from the claim text.