# US 9,006,088 B2 · Method for forming semiconductor gate structure and semiconductor gate structure

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- Number: US 9,006,088 B2
- Document ID: US9006088B2
- Status: Granted
- Kind: B2
- Application number: 13/980,803
- Filed: 2013-06-14
- Published: 2014-10-02
- Granted: 2015-04-14
- Earliest claimed: 2013-04-01
- Assignees: Tsinghua University
- Applicants: Tsinghua University
- Inventors: Mei Zhao; Renrong Liang; Jing Wang; Jun Xu
- Web page: https://patentgrep.com/patent/US9006088B2

## CPC

- H10D 64/118: {Electrodes comprising insulating layers having particular dielectric or electrostatic properties, e.g. having static charges}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 62/832: being Group IV materials comprising two or more elements, e.g. SiGe
- H10D 64/01356: {the insulator being formed after the semiconductor body, the semiconductor being a Group IV material and not being silicon, e.g. Ge, SiGe or SiGeC (H10D64/01364, H10D64/01366 take precedence)}
- H10D 64/511: {for IGFETs}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- H10P 14/6308: {of Group IV semiconductors}
- H10P 14/6316: {Formation by nitridation, e.g. nitridation of the substrate}
- H10P 14/6318: {Formation by simultaneous oxidation and nitridation}
- H10P 14/6319: {Formation by plasma treatments, e.g. plasma oxidation of the substrate}
- H10P 14/6322: {Formation by thermal treatments (formation by plasma treatment H10P14/6319)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for forming a semiconductor gate structure and a semiconductor gate structure are provided. The method includes: providing a substrate with a Ge layer as a surface thereof; forming a Sn layer on the Ge layer, in which an interface between the Ge layer and the Sn layer is a GeSn layer; removing the Sn layer to expose the GeSn layer; forming a GeSnOx passivation layer by performing an oxidation treatment for the GeSn layer, or forming a GeSnN or GeSnON passivation layer by performing a passivation treatment for the GeSn layer; and forming a gate stack on the GeSnOx , GeSnN or GeSnON passivation layer.

## Claims

### Claim 1

A method for forming a semiconductor gate structure, comprising:
providing a substrate with a Ge layer as a surface thereof;
forming a Sn layer on the Ge layer, wherein an interface between the Ge layer and the Sn layer is a GeSn layer;
removing the Sn layer to expose the GeSn layer;
forming a GeSnOx passivation layer by performing an oxidation treatment for the GeSn layer, or forming a GeSnN or GeSnON passivation layer by performing a passivation treatment for the GeSn layer; and
forming a gate stack on the GeSnOx , GeSnN or GeSnON passivation layer.

### Claim 2 (depends on 1)

The method according to claim 1, before removing the Sn layer, further comprising:
performing an annealing process to improve the GeSn layer.

### Claim 3 (depends on 1)

The method according to claim 1, wherein the Sn layer is removed by a solution with a high etching selection ratio between Sn and GeSn to expose the GeSn layer.

### Claim 4 (depends on 3)

The method according to claim 3, wherein a thickness of the GeSn layer remained ranges from 0.5nm to 40nm.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the oxidation treatment comprises: performing an oxidation annealing in an atmosphere containing oxygen and/or oxygen plasma to change all or a part of the GeSn layer into the GeSnOx passivation layer; and
the passivation treatment comprises: performing a passivation annealing in an atmosphere containing nitrogen and/or nitrogen plasma to change all or a part of the GeSn layer into the GeSnN or GeSnON passivation layer.

### Claim 6 (depends on 5)

The method according to claim 5, wherein a temperature of the oxidation annealing ranges from 100° C. to 500° C., and a temperature of the passivation annealing ranges from 100° C. to 600° C.

### Claim 7 (depends on 1)

The method according to claim 1, wherein the oxidation treatment comprises: performing a wet chemical oxidation in an oxidizing solution to change all or a part of the GeSn layer into the GeSnOx passivation layer.

### Claim 8 (depends on 1)

The method according to claim 1, wherein the substrate with the Ge layer as the surface thereof comprises a pure Ge substrate or a substrate with a Ge film as a surface layer thereof.