Methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks
AssigneeCadence Design Systems, Inc.
InventorJeffrey Salowe
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorJeffrey Salowe
Estimating the term…
Disclosed are methods, systems, and articles of manufacture for implementing a physical electronic design with area-bounded tracks. One aspect identifies an area in an electronic design and a track pattern associated with the area, identifies active tracks in the track pattern, and creates spacetiles with the active tracks. This aspect uses area-based search probes based on spacetiles to find viable implementation solutions to implement the area in the electronic design. Another aspect identifies a tracked area associated with a track pattern and a trackless area and use spacetile(s) and a via spacetile layer to transition between the tracked area and the trackless area for implementation of the electronic design in the tracked or the trackless area of the electronic design.
A computer implemented method for implementing a physical electronic design with area-bounded tracks, comprising:
A system for implementing a physical electronic design with area-bounded tracks, comprising:
An article of manufacture comprising a non-transitory computer accessible storage medium having stored thereupon a sequence of instructions which, when executed by at least one processor or at least one processor core executing one or more threads, causes the at least one processor or the at least one processor core to perform a method for implementing a physical electronic design with area-bounded tracks, the method comprising:
A computer implemented method for implementing a physical electronic design with area-bounded tracks, comprising executing a sequence of instructions with a processor or a processor core that executes one or more threads in a computing system to perform a process, the process comprising:
Dependencies are inferred from the claim text.