Memory system
AssigneeKabushiki Kaisha Toshiba
InventorsIkuo Magaki, Naoto Oshiyama, Kenichiro Yoshii, Kosuke Hatsuda, Shirou Fujita, Tokumasa Hara, Kohei Oikawa, Kenta Yasufuku
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AssigneeKabushiki Kaisha Toshiba
InventorsIkuo Magaki, Naoto Oshiyama, Kenichiro Yoshii, Kosuke Hatsuda, Shirou Fujita, Tokumasa Hara, Kohei Oikawa, Kenta Yasufuku
Estimating the term…
A memory system includes a first nonvolatile memory, a second nonvolatile memory with a longer access latency than the first nonvolatile memory, a first error correction unit, a second error correction unit, and an interface. The first nonvolatile memory stores first data and a first error correction code generated for the first data. The second nonvolatile memory stores a second error correction code which is generated for the first data with a higher correction ability than that of the first error correction code. The first error correction unit performs error correction on the first data by using the first error correction code. The second error correction unit performs error correction on the first data by using the second error correction code. The interface transmits the first data after the error correction to a host.
A memory system comprising:
A memory system comprising:
A method of error correction processing in a memory system having a first nonvolatile memory for storing first data and a first error correction code generated from the first data, and a second nonvolatile memory for storing a second error correction code generated from the first data and the first error correction code, said method comprising:
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