US 9,003,253 B2Granted

Method for testing data packet signal transceiver using coordinated transmitted data packet signal power

AssigneeLitePoint Corporation

InventorsChristian Volf Olgaard, Ruizu Wang, Guang Shi

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Abstract

A method for testing a data packet signal transceiver device under test (DUT) that minimizes time lost due to waiting for respective power levels of data packets transmitted by the DUT to settle at the desired nominal value for transmit signal testing. In accordance with exemplary embodiments, signals transmitted by the DUT during receive signal testing, e.g., as acknowledgement data packets, are transmitted at the nominal value for transmit signal testing, thereby allowing sufficient time for individual data packet signal power levels to settle and remain consistent at the nominal value by the time receive signal testing is completed and transmit signal testing is to begin.

Claims14

Dependent claims

A method of testing a data packet signal transceiver device under test (DUT), comprising:

receiving, with a DUT during a first plurality of portions of a first time interval, a tester data packet signal including a plurality of tester data packets;
transmitting, with said DUT during a second plurality of portions of said first time interval, a first DUT data packet signal having a nominal DUT signal power and including a plurality of first DUT data packets, wherein
respective ones of said first and second pluralities of portions of said first time interval are mutually alternating,
each one of said plurality of first DUT data packets corresponds to a respective one of at least a portion of said plurality of tester data packets, and
each one of at least a portion of said plurality of first DUT data packets has a respective one of a plurality of first DUT data packet powers substantially unequal to said nominal DUT signal power;
and
transmitting, with said DUT during a second time interval following said first time interval, a second DUT data packet signal having said nominal DUT signal power and including a plurality of second DUT data packets each one of which has a respective one of a plurality of second DUT data packet powers substantially equal to said nominal DUT signal power.

4 more elements

A method of operating a data packet signal transceiver tester for testing a data packet signal transceiver device under test (DUT), comprising:

transmitting, with a tester during a first plurality of portions of a first time interval, a tester data packet signal including a plurality of tester data packets;
receiving, with said tester during a second plurality of portions of said first time interval, a first DUT data packet signal having a nominal DUT signal power and including a plurality of first DUT data packets, wherein
respective ones of said first and second pluralities of portions of said first time interval are mutually alternating,
each one of said plurality of first DUT data packets corresponds to a respective one of at least a portion of said plurality of tester data packets, and
each one of at least a portion of said plurality of first DUT data packets has a respective one of a plurality of first DUT data packet powers substantially unequal to said nominal DUT signal power;
and
receiving, with said tester during a second time interval following said first time interval, a second DUT data packet signal having said nominal DUT signal power and including a plurality of second DUT data packets each one of which has a respective one of a plurality of second DUT data packet powers substantially equal to said nominal DUT signal power.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/972,280Filed 21 Aug 2013
Published: US 2015/0058691 A126 Feb 2015
Granted: 7 Apr 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G01R 31/319
Functional testing: tester hardware, i.e. output processing circuits
G01R 31/31725
Testing of digital circuits: timing aspects, e.g. clock distribution, skew, propagation delay
G01R 31/318371
Generation of test inputs, e.g. test vectors, patterns or sequences: methodologies therefor, e.g. algorithms, procedures
H04L 43/50
Arrangements for monitoring or testing data switching networks: testing arrangements