# US 9,003,218 B2 · Power shifting in multicore platforms by varying SMT levels > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 9,003,218 B2 - Document ID: US9003218B2 - Status: Granted - Kind: B2 - Application number: 13/476,179 - Filed: 2012-05-21 - Published: 2013-11-21 - Granted: 2015-04-07 - Earliest claimed: 2012-05-21 - Assignees: International Business Machines Corporation - Applicants: Pradip Bose; Alper Buyuktosunoglu; Dilma Menezes Da Silva; Hubertus Franke; Priyanka Tembey - Inventors: Pradip Bose; Alper Buyuktosunoglu; Dilma Menezes Da Silva; Hubertus Franke; Priyanka Tembey - Web page: https://patentgrep.com/patent/US9003218B2 ## CPC - G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 1/329: by task scheduling - G06F 9/4893: {taking into account power or heat criteria (power management in computers in general G06F1/3203; thermal management in computers in general G06F1/206)} - G06F 9/50: Allocation of resources, e.g. of the central processing unit [CPU] - G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode - Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE ## Abstract Power consumption in a microprocessor platform is managed by setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications. The multi-core microprocessor platform contains a plurality of physical cores, and each physical core is configurable into a plurality of logical cores. A simultaneous multithreading level in at least one physical core is adjusted by changing the number of logical cores on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level. Performance and power data based on simultaneous multi-threading levels are used in selecting the physical core to be adjusted. ## Claims ### Claim 1 A method for managing power consumption in a microprocessor platform, the method comprising: setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications, the multi-core microprocessor platform comprising a plurality of physical cores, each physical core configurable into a plurality of logical cores, each logical core executing a hardware thread from the multi-threaded application; and adjusting a simultaneous multithreading level in at least one physical core by changing a number of hardware threads executing on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level; wherein the step of adjusting the simultaneous multithreading level further comprises decreasing the number of hardware threads executing for a plurality of physical cores in series until a current power consumption level is less than or equal to the peak power level. ### Claim 2 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multithreading level further comprises adjusting the multithreading level in a plurality of physical cores by changing the number of hardware threads executing on each physical core. ### Claim 3 (depends on 2) The method of claim 2, wherein changing the number of hardware threads executing further comprises decreasing the number of hardware threads executing on at least one physical core and increasing the number of hardware threads executing on at least one physical core. ### Claim 4 (depends on 1) The method of claim 1, wherein: the method further comprises monitoring the current power level consumption continuously; and repeating the serial decreasing of the number of hardware threads executing through the plurality of physical cores each time the current power consumption level exceeds the peak power level. ### Claim 5 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multithreading level further comprises decreasing the number of hardware threads executing for a given physical core having a lowest number of currently executing instructions per second among the plurality of physical cores. ### Claim 6 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multithreading level further comprises decreasing the number of hardware threads executing for a plurality of physical cores in series based upon a number of currently executing instructions per second on each physical core from a lowest number of instructions per second to a highest number of instructions per second until a current power consumption level is less than or equal to the peak power level. ### Claim 7 (depends on 1) The method of claim 1, wherein the method further comprises monitoring the number of currently executing instructions per second continuously for each one of the plurality of physical cores. ### Claim 8 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multithreading level further comprises adjusting the simultaneous multithreading level in a plurality of physical cores to achieve a desired power savings and to maximize performance of the multi-core microprocessor platform in executing multi-threaded applications. ### Claim 9 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multithreading level further comprises: using a power consumption curve of multi-threaded application execution time versus power consumption and a performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for each physical core to select one or more physical cores; and adjusting the simultaneous multithreading level in the selected physical cores to achieve a desired power savings and to maximize performance of the multi-core microprocessor platform in executing multi-threaded applications. ### Claim 10 (depends on 9) The method of claim 9, wherein the step of adjusting the simultaneous multi-threading level in the selected physical cores comprises shifting the multi-threading level among the selected physical cores by decreasing the number of hardware threads executing on at least one selected physical core and increasing the number of hardware threads executing on at least one selected physical core. ### Claim 11 (depends on 1) The method of claim 1, wherein the step of adjusting the simultaneous multi-threading level further comprises: arranging the plurality of physical cores into a plurality of bins, each bin comprising a subset of the plurality of physical cores, each physical core in a given bin having a common power consumption curve of multi-threaded application execution time versus power consumption and a common performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for a given adjustment of multi-threading level; selecting at least one bin from the plurality of bins; and adjusting simultaneous multi-threading levels for all physical cores in each selected bin. ### Claim 12 (depends on 9) The method of claim 9, wherein the step of using the power consumption curve and the performance curve further comprises selecting physical cores that realize power savings without a decrease in performance for a given decrease in multi-threading level of those physical cores. ### Claim 13 (depends on 9) The method of claim 9, wherein the step of using the power consumption curve and the performance curve further comprises selecting physical cores having a largest ratio of power savings to performance decrease for a given decrease in multi-threading level of those physical cores. ### Claim 14 (depends on 9) The method of claim 9, wherein the step of using the power consumption curve and the performance curve further comprises: identifying physical cores running applications having memory intensive phases during which a given decrease in multi-threading level is possible without a decrease in performance and central processing unit intensive phases in which the given decrease in multi-threading level yields a decrease in performance; and selecting physical cores during the memory intensive phases. ### Claim 15 A method for managing power consumption in a microprocessor platform, the method comprising: setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications, the multi-core microprocessor platform comprising a plurality of physical cores, each physical core configurable into a plurality of logical cores, each logical core executing a hardware thread from the multi-threaded application; monitoring a number of currently executing instructions per second continuously for each one of the plurality of physical cores; and adjusting a simultaneous multithreading level in the physical cores in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level by decreasing the number of hardware threads executing for a plurality of physical cores in series based upon a number of currently executing instructions per second on each physical core from a lowest number of instructions per second to a highest number of instructions per second until a current power consumption level is less than or equal to the peak power level. ### Claim 16 A method for managing power consumption in a microprocessor platform, the method comprising: setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications, the multi-core microprocessor platform comprising a plurality of physical cores, each physical core configurable into a plurality of logical cores; maintaining using a power consumption curve of multi-threaded application execution time versus power consumption and a performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for each physical core; arranging the plurality of physical cores into a plurality of bins, each bin comprising a subset of the plurality of physical cores, each physical core in a given bin having a common power consumption curve and a common performance curve; and adjusting a simultaneous multithreading level in the physical cores in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level by: selecting at least one bin from the plurality of bins; and adjusting simultaneous multi-threading levels for all physical cores in each selected bin. ### Claim 17 A non-transitory computer-readable storage medium containing a computer-readable code that when read by a computer causes the computer to perform a method for managing power consumption in a microprocessor platform, the method comprising: setting a peak power level for power consumed by a multi-core microprocessor platform executing multi-threaded applications, the multi-core microprocessor platform comprising a plurality of physical cores, each physical core configurable into a plurality of logical cores, each logical core executing a hardware thread from the multi-threaded application; and adjusting a simultaneous multithreading level in at least one physical core by changing a number of hardware threads executing on that physical core in response to a power consumption level of the multi-core microprocessor platform exceeding the peak power level; wherein the step of adjusting the simultaneous multithreading level further comprises decreasing the number of hardware threads executing for a plurality of physical cores in series until a current power consumption level is less than or equal to the peak power level. ### Claim 18 (depends on 17) The non-transitory computer-readable storage medium of claim 17, wherein the step of adjusting the simultaneous multithreading level further comprises adjusting the multithreading level in a plurality of physical cores by decreasing the number of hardware threads executing on at least one physical core and increasing the number of hardware threads executing on at least one physical core. ### Claim 19 (depends on 17) The non-transitory computer-readable storage medium of claim 17, wherein the step of adjusting the simultaneous multithreading level further comprises decreasing the number of hardware threads executing for a plurality of physical cores in series based upon a number of currently executing instructions per second on each physical core from a lowest number of instructions per second to a highest number of instructions per second until a current power consumption level is less than or equal to the peak power level. ### Claim 20 (depends on 17) The non-transitory computer-readable storage medium of claim 17, wherein the step of adjusting the simultaneous multithreading level further comprises: using a power consumption curve of multi-threaded application execution time versus power consumption and a performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for each physical core to select one or more physical cores; and adjusting the simultaneous multithreading level in the selected physical cores to achieve a desired power savings and to maximize performance of the multi-core microprocessor platform in executing multi-threaded applications. ### Claim 21 (depends on 20) The non-transitory computer-readable storage medium of claim 20, wherein the step of adjusting the simultaneous multi-threading level in the selected physical cores comprises shifting the multi-threading level among the selected physical cores by decreasing the number of hardware threads executing on at least one selected physical core and increasing the number of hardware threads executing on at least one selected physical core. ### Claim 22 (depends on 20) The non-transitory computer-readable storage medium of claim 20, wherein the step of using the power consumption curve and the performance curve further comprises selecting physical cores that realize power savings without a decrease in performance for a given decrease in multi-threading level of those physical cores. ### Claim 23 (depends on 17) The non-transitory computer-readable storage medium of claim 17, wherein the step of adjusting the simultaneous multi-threading level further comprises: arranging the plurality of physical cores into a plurality of bins, each bin comprising a subset of the plurality of physical cores, each physical core in a given bin having a common power consumption curve of multi-threaded application execution time versus power consumption and a common performance curve of level of multi-threading versus amount of speedup in multi-threaded application execution for a given adjustment of multi-threading level; selecting at least one bin from the plurality of bins; and adjusting simultaneous multi-threading levels for all physical cores in each selected bin.