Memory control device, semiconductor memory device, memory system, and memory control method
AssigneeMegaChips Corporation
InventorsTakahiko Sugahara, Tetsuo Furuichi, Ikuo Yamaguchi, Takashi Oshikiri
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AssigneeMegaChips Corporation
InventorsTakahiko Sugahara, Tetsuo Furuichi, Ikuo Yamaguchi, Takashi Oshikiri
Estimating the term…
A technique for improving data security is provided. To be specific, in a memory system including an information processing apparatus and a semiconductor memory device, the semiconductor memory device has an interface section that transmits, to the information processing apparatus, data read out from a memory core according to a plurality of communication protocols having different signal transmission/reception methods. Based on a switch command inputted from the information processing apparatus, a communication protocol selection section inputs, to the interface section, a selection signal for selecting a particular communication protocol from the plurality of communication protocols.
A memory control device to control access to a memory core storing data therein, said memory control device comprising:
A semiconductor memory device comprising:
A memory system comprising an information processing apparatus and a semiconductor memory device, wherein said semiconductor memory device includes:
A memory control method to control access to a memory core storing data therein, said method comprising:
Dependencies are inferred from the claim text.