Nonvolatile memory apparatus including sharing driver capable of performing both of read and write operation

A nonvolatile memory apparatus, comprising:

• a sharing driver unit configured to supply a sensing node with voltage having a constant level in response to a read control signal, a write control signal and data;
• a memory cell configured to have a first terminal coupled with the sensing node and receive the voltage having the constant level;
• and
• a current sensing unit coupled with a second terminal of the memory cell and configured to sense an electric current flowing through the memory cell and generate a data output signal based on a result of the sensing,
• wherein the sharing driver comprises a control signal generator configured to generate digital code signals in response to the read control signal, the write control signal and the data, a Digital Analog Converter configured to generate the bias voltage in response to the digital code signals and a voltage generation unit configured to compare a level of the bias voltage with a voltage level of the sensing node and drive the sensing node at the voltage having the constant level based on a result of the comparison.

A nonvolatile memory apparatus, comprising:

• a sharing read/write control unit configured to supply a bias voltage to a plurality of memory blocks in response to a read control signal, a write control signal and data;
• a block switch configured to supply the bias voltage to a memory block, selected from the plurality of memory blocks, in response to a block selection signal;
• a voltage generation unit configured to receive the bias voltage from the block switch, compare a level of the received bias voltage with a voltage level of a sensing node, and drive the sensing node at voltage having a constant level based on a result of the comparison;
• and
• a memory cell coupled with the sensing node and configured to receive the voltage having the constant level,
• wherein the sharing read/write control unit comprises a control signal generator configured to generate digital code signals in response to the read control signal, the write control signal and the data and a Digital Analog Converter configured to generate the bias voltage in response to the digital code signals.