Method for erasing charge trap devices

A method of erasing charge trap devices, the method comprising:

• applying a first erase voltage to the charge trap devices;
• applying an erase verify voltage to the charge trap devices;
• determining erase states of the charge trap devices;
• performing a current first fail bit check operation comprising comparing a first number of charge trap devices, which are determined to be an erase fail based on the erase verify voltage, to a first reference value and determining a pass or fail based on the comparison result;
• determining whether a previous first fail bit check operation of a previous erase loop was passed or not, when the current first fail bit check operation is determined to be a fail;
• and
• applying a third erase voltage equal to a second erase voltage used in the previous erase loop during following erase loops, when the previous first fail bit check operation of the previous erase loop is determined to be a pass.