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US 9,001,577 B2Granted
Memory cell sensing
AssigneeMicron Technology, Inc.
InventorsMatthew Goldman, Pranav Kalavade, Uday Chandrasekhar, Mark A. Helm
Life of this patent
Estimating the term…
Abstract
This disclosure concerns memory cell sensing. One or more methods include determining a data state of a first memory cell coupled to a first data line, determining a data state of a third memory cell coupled to a third data line, transferring determined data of at least one of the first and the third memory cells to a data line control unit corresponding to a second data line to which a second memory cell is coupled, the second data line being adjacent to the first data line and the third data line, and determining a data state of the second memory cell based, at least partially, on the transferred determined data.
Claims39
A method for operating a memory, comprising:
- determining a data state of a first memory cell coupled to a first data line;
- determining a data state of a third memory cell coupled to a third data line;
- transferring the determined data state of at least one of the first and the third memory cells to a data line control unit corresponding to a second data line to which a second memory cell is coupled, the second data line being adjacent to the first data line and the third data line;
- and
- determining a data state of the second memory cell based, at least partially, on the at least one transferred determined data state stored in the data line control unit.
2 more elements
A method for operating a memory, comprising:
- determining a data state stored by a first memory cell coupled to a first data line and a second memory cell coupled to a third data line;
- transferring the determined data state stored by at least one of the first memory cell and the second memory cell for storage in a first data line control unit selectively coupled to a second data line to which a target memory cell is coupled, wherein the second data line is adjacent to the first data line and the third data line;
- and
- sensing a data state stored by the target memory cell using a plurality of sensing voltages applied to a selected access line to which the first memory cell, the second memory cell, and the target memory cell are coupled, the sensing voltages based, at least partially, on potential data state combinations of the first and second memory cells.
1 more element
A method for operating a memory, comprising:
- determining a data state of a first memory cell coupled to a first data line in response to a request to sense a data state of a target memory cell coupled to a second data line adjacent the first data line, wherein the first and second data lines are selectively coupled to a first shared data line control unit;
- determining a data state of a second memory cell coupled to a third data line adjacent to the second data line in response to the request to sense the data state of the target memory cell, wherein the third data line is selectively coupled to a second shared data line control unit;
- transferring the determined data state of the second memory cell from the second shared data line control unit to the first shared data line control unit;
- and
- determining the data state of the target memory cell based, at least partially, on the transferred determined data state of the second memory cell stored in the first shared data line control unit.
2 more elements
An apparatus, comprising:
- a first data line coupled to a first memory cell and selectively to a first data line control unit;
- a second data line coupled to a second memory cell and selectively to the first data line control unit, the second data line adjacent to the first data line;
- a third data line coupled to a third memory cell and selectively to a second data line control unit, the third data line adjacent to the second data line;
- and
- control circuitry configured to determine a data state of the second memory cell based, at least partially, on at least one of:
- a determined data state of the third memory cell transferred from the second data line control unit for storage in the first data line control unit;
- and
- a determined data state of the first memory cell determined by the first data line control unit.
5 more elements
An apparatus, comprising:
- a first data line coupled to a first memory cell and a second data line coupled to a target memory cell, wherein the first and target memory cells are adjacent and share a first data line control unit configured to determine a data state of the first memory cell;
- a third data line coupled to a second memory cell, wherein the second memory cell is adjacent to the target memory cell and has a second data line control unit associated therewith to determine a data state of the second memory cell;
- and
- a data transfer device selectively coupled to the first data line control unit and the second data line control unit and configured to enable the apparatus to transfer, via the data transfer device, a determined data state of the second memory cell for storage in the first data line control unit from the second data line control unit.
1 more element
An apparatus, comprising:
- a first data line coupled to a first memory cell and a second data line coupled to a target memory cell, wherein the first memory cell is adjacent to the target memory cell;
- a third data line coupled to a second memory cell, wherein the second memory cell is adjacent to the target memory cell;
- and
- circuitry configured to:
- determine a data state of the first memory cell coupled to a selected access line in response to a request to sense a data state of the target memory cell coupled to the selected access line;
- determine a data state of the second memory cell coupled to the selected access line in response to the request to sense the data state of the target memory cell;
- and
- determine a data state of the target memory cell based, at least partially, on at least one of the determined data state of the first memory cell and the determined data state of the second memory cell transferred to a first data line control unit selectively coupled to the target memory cell;
- and
- wherein the circuitry includes a data transfer device to transfer, by being selectively coupled to the first data line control unit shared between the first memory cell and the target memory cell, the determined data state of the second memory cell.
7 more elements
Dependencies are inferred from the claim text.