Semiconductor memory device and operation method thereof

A semiconductor memory device, comprising:

• a memory cell array including a plurality of first lines disposed on a substrate, a plurality of second lines disposed intersecting the first lines, and memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein;
• and
• a control circuit configured to apply a first voltage to a selected first line, apply a second voltage having a voltage value which is smaller than that of the first voltage to a selected second line, and apply a third voltage and a fourth voltage to a non-selected first line and a non-selected second line in a setting operation, respectively, such that a first potential difference is applied to a selected memory cell disposed at the intersection of the selected first line and the selected second line,
• the control circuit including a detection circuit configured to, during the setting operation, detect a transition of a resistance state of the selected memory cell using a reference voltage, and
• the control circuit being configured capable of changing the reference voltage.

A method of operating a semiconductor memory device,

• the semiconductor memory device comprising a memory cell array including a plurality of first lines disposed on a substrate, a plurality of second lines disposed intersecting the first lines, and memory cells disposed at each of intersections of the first lines and the second lines and each configured having a current rectifier element and a variable resistance element connected in series therein, and
• the semiconductor memory device configured to execute a setting operation in which a first voltage is applied to a selected first line, a second voltage having a voltage value which is smaller than that of the first voltage is applied to a selected second line, and a third voltage and a fourth voltage are applied to a non-selected first line and a non-selected second line, respectively, such that a first potential difference is applied to a selected memory cell disposed at the intersection of the selected first line and the selected second line,
• the method comprising:
• before the setting operation, executing a read operation in which the third voltage is applied to the selected first line and the non-selected first line, the second voltage is applied to the selected second line, and the fourth voltage is applied to the non-selected second line, and setting a reference voltage based on a voltage value of the selected second line during the read operation;
• and
• during the setting operation, detecting a transition of a resistance state of the selected memory cell using the reference voltage.