Pre-amplifier output stage with integrated test buffer
AssigneeTexas Instruments Incorporated
InventorDouglas Warren Dean
Life of this patent
Estimating the term…
Abstract
Disk drive pre-amplifier output stage circuitry is presented including a high pass input filter for removing DC offsets from differential read data signals and providing an input to AB drivers of the output stage, in which an offset test circuit selectively drives the high pass filter output nodes according to the offset at the filter input to facilitate measurement of the preceding circuit offset at the driver output terminals, and a common mode regulator circuit regulates common mode voltages at the first and second driver output nodes to a predetermined value in read and write modes.
Claims19
A pre-amplifier output stage for a pre-amplifier of a disk drive system, the output stage comprising:
- a high pass filter circuit with first and second filter inputs that receive a differential input from a pre-amplifier gain stage, the high pass filter circuit providing a differential filter output to first and second filter output nodes, the high pass filter circuit comprising:
- a first capacitor connected between the first filter input and the first filter output node,
- a first filter resistance connected between the first filter output node and a filter rail node,
- a second capacitor connected between the second filter input and the second filter output node, and
- a second filter resistance connected between the second filter output node and the filter rail node;
- a driver circuit, comprising first and second driver inputs connected to the first and second filter output nodes and providing a differential driver output at first and second driver output nodes;
- a reference generator circuit providing a reference voltage;
- a regulator circuit operative when the pre-amplifier output stage is in a read mode for reading data from the disk drive system to source or sink current to or from the filter rail node to regulate common mode voltages at the first and second driver output nodes according to the reference voltage, the regulator circuit comprising:
- a transconductance amplifier with a first input connected to the reference voltage, a second input, and an output connected to the filter rail node,
- a first feedback resistor connected between the second input of the transconductance amplifier and the first driver output node, and
- a second feedback resistor connected between the second input of the transconductance amplifier and the second driver output node.
A disk drive pre-amplifier circuit, comprising:
- at least one gain stage receiving an input signal from a magnetoresistive sensor of a disk drive system;
- and
- an output stage, comprising:
- a high pass filter circuit with first and second filter inputs that receive a differential input from the at least one gain stage, the high pass filter circuit providing a differential filter output to first and second filter output nodes,
- a driver circuit, comprising first and second driver inputs connected to the first and second filter output nodes and providing a differential driver output at first and second driver output nodes,
- a regulator circuit operative when the pre-amplifier circuit is in a read mode for reading data from the disk drive system or a write mode for writing data to the disk drive system to regulate common mode voltages at the first and second driver output nodes to a predetermined value, and
- an offset test circuit inactive when the pre-amplifier circuit is in the read mode or a write mode, and active when the pre-amplifier output stage is in a first test mode to provide a differential voltage signal at the first and second filter output nodes based on a differential voltage signal at the first and second filter inputs to regulate a differential voltage signal at the first and second driver output nodes to be approximately the same as the differential voltage signal at the first and second filter inputs,
- wherein the offset test circuit comprises:
- first and second emitter follower circuits with corresponding first and second inputs connected to the first and second filter inputs, respectively, and corresponding first and second outputs;
- a first differential pair circuit comprising first and second transistors with emitter terminals coupled to one another through a resistor, base terminals individually connected to a corresponding output of the first and second emitter follower circuits, and collector terminals individually connected to a corresponding one of the first and second filter output nodes;
- and
- a second differential pair circuit comprising first and second transistors with emitter terminals coupled to one another through a resistor, base terminals individually connected to a corresponding one of the first and second driver output nodes, and collector terminals individually connected to a corresponding one of the first and second filter output nodes.
A pre-amplifier output stage for a pre-amplifier of a disk drive system, the output stage comprising:
- a high pass filter circuit with first and second filter inputs that receive a differential input from a pre-amplifier gain stage, and first and second filter output nodes providing a differential filter output;
- a driver circuit, comprising first and second driver inputs connected to the first and second filter output nodes and providing a differential driver output at first and second driver output nodes;
- a regulator circuit operative when the pre-amplifier circuit is in a read mode for reading data from the disk drive system or a write mode for writing data to the disk drive system to regulate common mode voltages at the first and second driver output nodes to a predetermined value;
- and an offset test circuit inactive when the pre-amplifier circuit is in the read mode or a write mode, and active when the pre-amplifier output stage is in a first test mode to provide a differential voltage signal at the first and second filter output nodes based on a differential voltage signal at the first and second filter inputs to regulate a differential voltage signal at the first and second driver output nodes to be approximately the same as the differential voltage signal at the first and second filter inputs;
- wherein the offset test circuit comprises:
- first and second emitter follower circuits with corresponding first and second inputs connected to the first and second filter inputs, respectively, and corresponding first and second outputs;
- a first differential pair circuit comprising first and second transistors with emitter terminals coupled to one another through a resistor, base terminals individually connected to a corresponding output of the first and second emitter follower circuits, and collector terminals individually connected to a corresponding one of the first and second filter output nodes;
- and a second differential pair circuit comprising first and second transistors with emitter terminals coupled to one another through a resistor, base terminals individually connected to a corresponding one of the first and second driver output nodes, and collector terminals individually connected to a corresponding one of the first and second filter output nodes.
Dependencies are inferred from the claim text.