Technique for GPU command scheduling
AssigneeTelefonaktiebolaget L M Ericsson (publ)
InventorPer Persson
Life of this patent
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Abstract
A technique for scheduling the dispatching of Graphics Processing Unit (GPU) commands is described. A method implementation of this technique comprises receiving commands from a plurality of applications, buffering the received commands, and dispatching the buffered commands as a command batch towards a GPU. The dispatching is scheduled such that a GPU idle period is created between two successive command batches dispatched towards the GPU.
Claims21
A method of scheduling the dispatching of Graphical Processing Unit (GPU) commands, the method comprising:
- receiving commands from a plurality of applications;
- buffering the received commands;
- creating a graph from the buffered commands;
- wherein the graph includes nodes and edges linking the nodes;
- wherein each node represents one or more of the buffered commands that result in a specific destination surface when applied to zero, one or more source surfaces each;
- wherein each edge links a first node representative of one destination surface with a second node representative of one source surface for the first node;
- dispatching the buffered commands as a command batch towards a GPU;
- wherein the dispatching is controlled based on a scheduling by an operating system executed by a Central Processing Unit (CPU) and independently from processing requests initiated by the GPU itself, the scheduling being determined to control creation of a GPU idle period between two successive command batches dispatched towards the GPU.
A computer program product stored in a non-transitory computer readable medium for scheduling the dispatching of Graphical Processing Unit (GPU) commands, the computer program product comprising software instructions which, when run on a computing device, causes the computing device to:
- receive commands from a plurality of applications;
- buffer the received commands;
- create a graph from the buffered commands;
- wherein the graph includes nodes and edges linking the nodes;
- wherein each node represents one or more of the buffered commands that result in a specific destination surface when applied to zero, one or more source surfaces each;
- wherein each edge links a first node representative of one destination surface with a second node representative of one source surface for the first node;
- control the dispatch of the buffered commands as a command batch towards a GPU based on a scheduling by an operating system executed by a Central Processing Unit (CPU) and independently from processing requests initiated by the GPU itself, the scheduling being determined to control creation of a GPU idle period between two successive command batches dispatched towards the GPU.
A scheduler for Graphical Processing Unit (GPU) commands, the scheduler comprising:
- one or more processing circuits configured to operate as:
- an interface configured to receive commands from a plurality of applications;
- a buffer configured to buffer the received commands;
- a controller configured to:
- dispatch the buffered commands as a command batch towards a GPU;
- create a graph from the buffered commands;
- wherein the graph includes nodes and edges linking the nodes;
- wherein each node represents one or more of the buffered commands that result in a specific destination surface when applied to zero, one or more source surfaces each;
- wherein each edge links a first node representative of one destination surface with at least one second node representative of one source surface for the first node;
- wherein the controller is configured to control the dispatching based on a scheduling by an operating system executed by a Central Processing Unit (CPU) and independently from processing requests initiated by the GPU itself, the scheduling being determined to control creation of a GPU idle period between two successive command batches dispatched towards the GPU.
Dependencies are inferred from the claim text.