Scan driving device for a display device and driving method thereof

A method for driving a scan driving device including a plurality of scan drive blocks, each of the scan drive blocks including a first transistor having a gate electrode connected to a first node to which a gate on voltage is transmitted according to a clock signal that is input to a first clock signal input terminal and transmitting a first power source voltage to an output terminal, a second transistor having a gate electrode connected to a second node and transmitting a clock signal that is input to a second clock signal input terminal to the output terminal, and a third transistor having a gate electrode connected to the first node and transmitting a signal that is input to an input signal input terminal to the second node, the method comprising:

• applying the clock signal that is input to the first clock signal input terminal and the signal that is input to the input signal input terminal as a gate on voltage, and applying the clock signal that is input to second clock signal input terminal as a gate off voltage;
• transmitting the gate on voltage to the first node according to the clock signal that is input to the first clock signal input terminal and transmitting the signal that is input to the input signal input terminal to the second node to reset the first node and the second node with the gate on voltage;
• and
• outputting a scan signal of a gate off voltage to the output terminal through the first transistor and the second transistor.

An apparatus, comprising:

• a first circuit to apply a first clock signal to a first clock signal input terminal of a driver and a input signal to an input signal input terminal of the driver as a gate on voltage, and to apply a second clock signal to a second clock signal input terminal of the driver as a gate off voltage;
• a second circuit to transmit the gate on voltage to a first node of the driver based on the first clock signal, and to transmit the input signal to a second node of the driver to reset the first node and the second node based on the gate on voltage;
• and
• a third circuit to output a scan signal of a gate off voltage to an output terminal of the driver, wherein the driver includes at least one scan drive block which includes:
• the at least one scan driver block includes a first transistor having a gate electrode connected to the first node to receive the gate on voltage based on the first clock signal, an output terminal to receive a first power source voltage, a second transistor having a gate electrode connected to the second node, a third transistor having a gate electrode connected to the first node, and the input signal input terminal is connected to the second node and the second clock signal input terminal is connected to the output terminal.