US 9,000,960 B2 · High-order and nested redundancies in time-interleaved ADCs

Abstract

Examples are provided for time-interleaved analog-to-digital conversion with redundancy. The redundancy may include high-order and nested redundancies. An apparatus may include multiple analog-to-digital converter (ADC) blocks coupled to one another to form a time-interleaved ADC. Each ADC block may include multiple ADC slices, wherein a count of the ADC blocks is M and some of the ADC slices may be redundant slices. A clock circuit may be configured to provide multiple clock signals. A portion N of M ADC blocks may be configured to be active, in a normal mode of operation, where N and M are integer numbers and N is smaller than M. A remaining portion of the M ADC blocks may be redundant ADC blocks, one or more of which may be selectively active, in a healing mode of operation, and be swapped for one or more failed ADC blocks using the plurality of clock signals.

Claims20

Dependent claims

An apparatus for providing time-interleaved analog-to-digital conversion with redundancy, comprising:

a plurality of analog-to-digital converter (ADC) blocks coupled to one another to form a time-interleaved ADC, each ADC block including a plurality of ADC slices, wherein a count of the plurality of ADC blocks is M;
and
a clock circuit configured to provide a plurality of clock signals,
wherein:
a portion N of M ADC blocks are configured to be active, in a normal mode of operation,
N and M are integer numbers,
N is smaller than M,
a remaining portion of the M ADC blocks are redundant ADC blocks, and
one or more of the redundant ADC blocks are configured to be selectively active, in a healing mode of operation, and be swapped for one or more failed ADC blocks using the plurality of clock signals.

6 more elements

A method for providing redundancy in a time-interleaved analog-to-digital converter (ADC), comprising:

coupling a plurality of ADC blocks to form the time-interleaved ADC, each ADC block including a plurality of ADC slices, wherein a count of the plurality of ADC blocks is M;
configuring a clock circuit to provide a plurality of clock signals;
configuring a portion N of M ADC blocks to be active, in a normal mode of operation, wherein N and M are integer numbers, N is smaller than M, and a remaining portion of the M ADC blocks are redundant ADC blocks;
and
configuring one or more of the redundant ADC blocks to be selectively active, in a healing mode of operation, and be swapped for one or more failed ADC blocks using the plurality of clock signals.

2 more elements

A non-transitory machine-readable medium comprising instructions stored therein, the instructions executable by one or more processors to facilitate performing a method for healing a time-interleaved analog-to-digital converter (ADC), the method comprising:

coupling a plurality of ADC blocks to form the time-interleaved ADC, each ADC block including a plurality of ADC slices, wherein a count of the plurality of ADC blocks is M;
configuring a clock circuit to provide a plurality of clock signals;
configuring a portion N of M ADC blocks to be active, in a normal mode of operation, wherein N and M are integer numbers, N is smaller than M, and a remaining portion of the M ADC blocks are redundant ADC blocks;
and
configuring one or more of the redundant ADC blocks to be selectively active, in a healing mode of operation, and be swapped for one or more failed ADC blocks using the plurality of clock signals.

2 more elements

Dependencies are inferred from the claim text.

High-order and nested redundancies in time-interleaved ADCs

Life of this patent

High-order and nested redundancies in time-interleaved ADCs

Life of this patent

Abstract

Claims20